This series proposes support for mapping subranges within a PCIe endpoint BAR and enables controllers to program inbound address translation for those subranges.
- Patch 1/3 introduces generic BAR subrange mapping support in the PCI endpoint core. - Patch 2/3 changes dw_pcie_ep_ops.get_features() to return a mutable struct pci_epc_features * and updates all DWC-based glue drivers accordingly. This is preparatory work for Patch 3/3. - Patch 3/3 adds an implementation for the DesignWare PCIe endpoint controller using Address Match Mode IB iATU. It also advertises subrange_mapping support from the DWC EP midlayer. This series is originally a spin-off from a larger RFC series posted earlier: https://lore.kernel.org/all/[email protected]/ The first user will likely be Remote eDMA-backed NTB transport, demonstrated in that RFC series. Kernel base: - repo: git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git - branch: controller/dwc - commit: 68ac85fb42cf ("PCI: dwc: Use cfg0_base as iMSI-RX target address to support 32-bit MSI devices") Changelog: * v4->v5 changes: - Added subrange_mapping to struct pci_epc_features and enforced a strict capability check in pci_epc_set_bar() (reject use_submap when unsupported). - Changed DWC-based glue drivers to return a mutable features pointer and set subrange_mapping centrally at the DWC midlayer. - Split the series into 3 patches accordingly. * v3->v4 changes: - Drop unused includes that should have been removed in v3 * v2->v3 changes: - Remove submap copying and sorting from dw_pcie_ep_ib_atu_addr(), and require callers to pass a sorted submap. The related source code comments are updated accordingly. - Refine source code comments and commit messages, including normalizing "Address Match Mode" wording. - Add const qualifiers where applicable. * v1->v2 changes: - Introduced stricter submap validation: no holes/overlaps and the subranges must exactly cover the whole BAR. Added dw_pcie_ep_validate_submap() to enforce alignment and full-coverage constraints. - Enforced one-shot (all-or-nothing) submap programming to avoid leaving half-programmed BAR state: * Dropped incremental/overwrite logic that is no longer needed with the one-shot design. * Added dw_pcie_ep_clear_ib_maps() and used it from multiple places to tear down BAR match / address match inbound mappings without code duplication. - Updated kernel source code comments and commit messages, including a small refinement made along the way. - Changed num_submap type to unsigned int. v4: https://lore.kernel.org/all/[email protected]/ v3: https://lore.kernel.org/all/[email protected]/ v2: https://lore.kernel.org/all/[email protected]/ v1: https://lore.kernel.org/all/[email protected]/ Thank you for reviewing, Koichiro Den (3): PCI: endpoint: Add BAR subrange mapping support PCI: dwc: Allow glue drivers to return mutable EPC features PCI: dwc: ep: Support BAR subrange inbound mapping via Address Match Mode iATU drivers/pci/controller/dwc/pci-dra7xx.c | 4 +- drivers/pci/controller/dwc/pci-imx6.c | 10 +- drivers/pci/controller/dwc/pci-keystone.c | 4 +- .../pci/controller/dwc/pci-layerscape-ep.c | 2 +- drivers/pci/controller/dwc/pcie-artpec6.c | 4 +- .../pci/controller/dwc/pcie-designware-ep.c | 242 +++++++++++++++++- .../pci/controller/dwc/pcie-designware-plat.c | 4 +- drivers/pci/controller/dwc/pcie-designware.h | 4 +- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 8 +- drivers/pci/controller/dwc/pcie-keembay.c | 4 +- drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 +- drivers/pci/controller/dwc/pcie-rcar-gen4.c | 4 +- drivers/pci/controller/dwc/pcie-stm32-ep.c | 4 +- drivers/pci/controller/dwc/pcie-tegra194.c | 4 +- drivers/pci/controller/dwc/pcie-uniphier-ep.c | 58 +++-- drivers/pci/endpoint/pci-epc-core.c | 3 + include/linux/pci-epc.h | 3 + include/linux/pci-epf.h | 31 +++ 18 files changed, 329 insertions(+), 68 deletions(-) -- 2.51.0
