On Mon, Mar 09, 2026 at 04:35:29PM +0800, Shengjiu Wang wrote:

> +     SOC_SINGLE_EXT("Transmit Timestamp Reset", FSL_SAI_TTCTL, 
> FSL_SAI_xTCTL_RTSC_SHIFT, 1, 0,
> +                    fsl_asoc_get_volsw, fsl_asoc_put_volsw),
> +     SOC_SINGLE_EXT("Transmit Bit Counter Reset", FSL_SAI_TTCTL, 
> FSL_SAI_xTCTL_RBC_SHIFT, 1, 0,
> +                    fsl_asoc_get_volsw, fsl_asoc_put_volsw),

Sorry, I should've spotted this on earlier review (though surely you
will have seen this on running mixer-test?) but these fail:

# # verdinwm8904.2 Transmit Timestamp Reset
# # 0.2 Transmit Timestamp Reset is a writeable boolean but not a Switch
# not ok 366 name.verdinwm8904.2
# ok 367 write_default.verdinwm8904.2
# # Spurious event generated for Transmit Timestamp Reset

The reset controls should be volatile, always read zero and not generate
events as a result.  The name needs fixing as well.

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