David Gibson wrote:
Don't be patronising. There is an existing address space defined by the gpio binding. Defining another one is pointless redundancy. This is standard good ideas in computer science, no further argument necessary.
The existing address space, and the patches Anton etc. just submitted which I started this discussion to address, don't fulfil certain needs. You could do better than call it insane, by describing how you would define a gpio bank that used 3 seperate pins which are NOT together in a register, using a base address (reg) and base property (offset of first pin) with the current system? -- Matt Sealey <[EMAIL PROTECTED]> Genesi, Manager, Developer Relations _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
