n Mon, 08 Dec 2008 21:57:12 -1000
"Mitch Bradley" <[EMAIL PROTECTED]> wrote:
> One address/size cell isn't enough for the next generation of NAND
> FLASH chips.
>
I am no dts expert, but I thought I could put:
nand {
#address-cells = <1>;
#size-cells = <1>;
in my dts and you could put:
nand {
#address-cells = <2>;
#size-cells = <2>;
and, assuming we specified the reg entry right, everything would just
work. Is that assumption wrong?
And if the assumption is true, should I make a note in the doc that you
can make the address and size bigger?
Cheers,
Sean
In principle that is correct, but the device tree partition parser in
the Linux kernel assumes one address cell and one size cell, or at least
it did the last time I looked.
I wrote a patch to fix that and circulated it on the linuxppc list, but
since lost interest. OLPC (my main focus) is probably going to switch to
managed NAND (SSD, LBA-NAND, eMMC, or some such thing with a built-in
Flash Translation Layer) at some point. Raw NAND is starting to go by
the wayside.
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