Stefan Roese wrote:
>
>
>> Is this an expected behavior - detection of 256 MiB NAND flash
>> takes around 20 seconds. The ndfc driver works fine after boot.
>
> No, 20 seconds is definitely too long. Something must be wrong with the
> ndfc
> driver or the NAND dts entries.
>
> Best regards,
> Stefan
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> Linuxppc-dev@ozlabs.org
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>
Thanks, Stefan
My ndfc DTS entry looks like this
n...@3,0 {
compatible = "amcc,ndfc";
reg = <0x00000003 0x00000000 0x00002000>;
ccr = <0x00001000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
partit...@0 {
label = "data";
reg = <0x00000000 0x10000000>;
};
};
I also had to modify u-boot to provide ndfc ebc mappings.
Not sure if it's the best solution, but it worked. Sorry for
posting u-boot stuff here, I'll stop doing that if list thinks
it's irrelevant.
My u-boot code looks like this (modified canyonlands code):
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[8];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = CFG_FLASH_BASE_PHYS_L; /* we fixed up this address
*/
val[3] = gd->bd->bi_flashsize;
/* Set NAND Controller mapping */
val[4] = CFG_NAND_CS; /* chip select number */
val[5] = 0; /* always 0 */
val[6] = CFG_NAND_ADDR; /* NAND address */
val[7] = 0x2000; /* NAND register area
size */
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc) {
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
}
Felix.
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