> Yes, you could phrase it that way. According to the PPC440EPx manual, 
> the total memory size is calculated based on the following formula:
> memsize = cs * (1 << (col+row)) * bank * dpath;
> So, if both chipselects are used, we add an extra bit to the memory 
> address to distinguish between these chipselects.
> There's nothing wrong with this part of the code.
> The problem is that the controller is hardwired to use only one 
> chipselect, even if both are enabled in the DDR0_10 on PPC440EPx/GRx 
> processors.
> So, the patch provides a workaround to always use single cs for 
> 440EPx/GRx (use predefined value instead of reading DDR0_10).

Mikhail, can you verify that Valentine's patch works for you ?

Cheers,
Ben.


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