On Wed, 2009-03-11 at 10:18 -0500, Kumar Gala wrote: > CoreInt provides a mechansim to deliver the IRQ vector directly > into the core on an interrupt (via the SPR EPR) rather than having > to go IACK on the PIC. This is suppose to provide an improvment > in interrupt latency by reducing the time to get the IRQ vector. > > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > * Fixed MPIC_GREG_GCONF_COREINT flag to be 0x60000000 as per spec and pointed > about by Dave
Are you sure ? That's 2 bits ... Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
