Hi Grant,

On Thu, 20 Aug 2009 23:30:17 -0600 Grant Likely <grant.lik...@secretlab.ca> 
wrote:
>
> +/**
> + * get_int_prop - Decode a u32 from a device tree property
> + */
> +static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
> +{
> +     const u32 *prop;
> +     int len;
> +
> +     prop = of_get_property(np, name, &len);
> +     if (prop && len >= 4)
> +             return *prop;
> +     return def;
> +}

Maybe you could use sparc's of_getintprop_default() (after moving it into
drivers/of ...

> +
> +/**
> + * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
> + * @addr0: value of 1st cell of a device tree PCI address.
> + * @bridge: Set this flag if the address is from a bridge 'ranges' property
> + */
> +unsigned int pci_parse_of_flags(u32 addr0, int bridge)
> +{
> +     unsigned int flags = 0;
> +
> +     if (addr0 & 0x02000000) {
> +             flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
> +             flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
> +             flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
> +             if (addr0 & 0x40000000)
> +                     flags |= IORESOURCE_PREFETCH
> +                              | PCI_BASE_ADDRESS_MEM_PREFETCH;
> +             /* Note: We don't know whether the ROM has been left enabled
> +              * by the firmware or not. We mark it as disabled (ie, we do
> +              * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
> +              * do a config space read, it will be force-enabled if needed
> +              */
> +             if (!bridge && (addr0 & 0xff) == 0x30)
> +                     flags |= IORESOURCE_READONLY;
> +     } else if (addr0 & 0x01000000)
> +             flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
> +     if (flags)
> +             flags |= IORESOURCE_SIZEALIGN;
> +     return flags;
> +}
> +
> +/**
> + * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
> + * @node: device tree node for the PCI device
> + * @dev: pci_dev structure for the device
> + *
> + * This function parses the 'assigned-addresses' property of a PCI devices'
> + * device tree node and writes them into the associated pci_dev structure.
> + */
> +static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
> +{
> +     u64 base, size;
> +     unsigned int flags;
> +     struct resource *res;
> +     const u32 *addrs;
> +     u32 i;
> +     int proplen;
> +
> +     addrs = of_get_property(node, "assigned-addresses", &proplen);
> +     if (!addrs)
> +             return;
> +     pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
> +     for (; proplen >= 20; proplen -= 20, addrs += 5) {
> +             flags = pci_parse_of_flags(addrs[0], 0);
> +             if (!flags)
> +                     continue;
> +             base = of_read_number(&addrs[1], 2);
> +             size = of_read_number(&addrs[3], 2);
> +             if (!size)
> +                     continue;
> +             i = addrs[0] & 0xff;
> +             pr_debug("  base: %llx, size: %llx, i: %x\n",
> +                      (unsigned long long)base,
> +                      (unsigned long long)size, i);
> +
> +             if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
> +                     res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
> +             } else if (i == dev->rom_base_reg) {
> +                     res = &dev->resource[PCI_ROM_RESOURCE];
> +                     flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
> +             } else {
> +                     printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
> +                     continue;
> +             }
> +             res->start = base;
> +             res->end = base + size - 1;
> +             res->flags = flags;
> +             res->name = pci_name(dev);
> +     }
> +}

And similarly with sparc's pci_parse_of_addrs() and pci_parse_of_flags
() ?  Maybe create drivers/of/pci.c (or drivers/pci/of.c)?  Or maybe they
are still too different?

There is probably scope for more consolidation there.
-- 
Cheers,
Stephen Rothwell                    s...@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

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