Dan Malek <d...@embeddedalley.com> wrote on 08/10/2009 22:11:07: > > > On Oct 8, 2009, at 12:22 PM, Joakim Tjernlund wrote: > > > hare are comments in the kernel that dcbst wrongly > > generates TLB Errors with store set on 8xx. Is this really so? > > Should dcbst always trap as a load?
Hi, been a long time since I heard from you :) > > There are many comments written about 8xx as various > behavior was discovered. Worse, some of these details > would be different among the different processor versions. > You need to be careful and test as many different part > versions as possible to ensure you have everything > covered..... then someone will find a part that doesn't > quite work, "fix" it, and break others :-) > > In this particular case, the PEM does state dcbst is treated > as a load, but from experience we know 8xx doesn't work > that way. Of course, since dcbst is a store operation, > you could argue that 8xx got it correct :-) One could try clearing the store bit in the page fault handler, but then that might cause a loop. Not sure it has any practical meaning though. Anyhow, you are welcome to have a look at the patches I have been tossing out. Jocke _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
