Hi Joakim:

> Does this reset sequence also send a START condition for every clock?

Please see the attached scan from a scope output, showing the first two out of 
the 9 sequences at 375 kHz (that's what the 5200's divider makes from 400 kHz 
requested).  Resolution is 2us/div and 1V/div for both signals.  The waveform 
itself for each of the 9 sequences is exactly the same we had before with the 
old solution, just the timing is faster and adjusted to the ii2c clock, i.e. 
the /relative/ waveforms look identical for slower clocks.

Any insight if this is *really* correct would be great, as I'm not an i2c 
expert.  I can only say it reliably fixes the bus hangs I saw!

Thanks,
Albrecht.

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