On Mar 4, 2010, at 11:06 AM, Hollis Blanchard wrote: > On Mon, Mar 1, 2010 at 11:13 AM, Dave Kleikamp <sha...@linux.vnet.ibm.com> > wrote: > powerpc/476: define specific cpu table entry for DD1 and DD1.1 cores > > From: Benjamin Herrenschmidt <b...@kernel.crashing.org> > > There are still some unstable bits on the DD1 and DD1.1 cores. Don't use > the FPU or the tlbivax operation. Define CPU_FTR_476_DD1 and > CPU_FTR_476_DD1_1 for additional workarounds in later patches. > > The DD1 core requires workarounds triggered by both CPU_FTR_476_DD1 > and CPU_FTR_476_DD1_1. the DD1.1 core only needs CPU_FTR_476_DD1_1 > defined. > > Isn't the policy generally not to commit workarounds for early/errataful > hardware which will not be seen in the real world? Otherwise, every new > half-broken core could burn a bunch of feature bits... > > -Hollis
I'm with Hollis. Cluttering the code with non-production errata could get very ugly as well as burning feature bits up like made. - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev