Benjamin Herrenschmidt wrote:
On Sat, 2010-06-12 at 20:45 +1000, Benjamin Herrenschmidt wrote:
On Fri, 2010-06-11 at 22:19 -1000, Mitch Bradley wrote:
It seems that many of the differences at the CPU level can be determined
by looking at "coprocessor" registers. For what purpose(s) do we need
to identify the core? That will inform our choice of a core ID schema.
The primary thing I see would be architecture version compliance,
though this is better carried additionally via a binary field in
the header or a GPR at the entry point, to help the initial asm
code to setup the MMU etc... before getting into C code.
Also, if you're going to revive a "real" OF port to ARM (with client
interface etc...), should we start considering moving some of powerpc's
prom_init.c to a generic place ?
IE. prom_init is a trampoline that uses the client interface to
essentially create a flatten device-tree and enter the kernel via the
common "epapr" style entry point.
The main drawback is that it doesn't allow to keep OF alive along with
the OS, but then, only sparc does that successfully and I'm not sure
it's something that would be practical to do on ARM either.
I'm certainly going to try keeping OFW alive. On the x86 OLPC machines,
the ability to
dive into OFW via a SysRq key combo was very helpful for debugging some
difficult
problems. The team has asked me to support the feature on ARM.
Cheers,
Ben.
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