From: Anton Vorontsov <avoront...@mvista.com> Date: Wed, 30 Jun 2010 20:39:15 +0400
> MPC8313ECE says: > > "If the controller receives a 1- or 2-byte frame (such as an illegal > runt packet or a packet with RX_ER asserted) before GRS is asserted > and does not receive any other frames, the controller may fail to set > GRSC even when the receive logic is completely idle. Any subsequent > receive frame that is larger than two bytes will reset the state so > the graceful stop can complete. A MAC receiver (Rx) reset will also > reset the state." > > This patch implements the proposed workaround: > > "If IEVENT[GRSC] is still not set after the timeout, read the eTSEC > register at offset 0xD1C. If bits 7-14 are the same as bits 23-30, > the eTSEC Rx is assumed to be idle and the Rx can be safely reset. > If the register fields are not equal, wait for another timeout > period and check again." > > Signed-off-by: Anton Vorontsov <avoront...@mvista.com> Applied. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev