On Mar 5, 2011, at 3:05 PM, Kumar Gala wrote: > From: Kumar Gala <kumar.g...@freescale.com> > > If the spin table is located in the linear mapping (which can happen if > we have 4G or more of memory) we need to access the spin table via a > cacheable coherent mapping like we do on ppc32 (and do explicit cache > flush). > > See the following commit for the ppc32 version of this issue: > > commit d1d47ec6e62ab08d2ebb925fd9203abfad3adfbf > Author: Peter Tyser <pty...@xes-inc.com> > Date: Fri Dec 18 16:50:37 2009 -0600 > > powerpc/85xx: Fix SMP when "cpu-release-addr" is in lowmem > > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > arch/powerpc/platforms/85xx/smp.c | 6 +++++- > 1 files changed, 5 insertions(+), 1 deletions(-)
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