On Jan 25, 2011, at 12:02 AM, Liu Yu wrote: > This errata can occur if a single-precision floating-point, double-precision > floating-point or vector floating-point instruction on a mispredicted branch > path signals one of the floating-point data interrupts which are enabled by > the > SPEFSCR (FINVE, FDBZE, FUNFE or FOVFE bits). This interrupt must be recorded > in a one-cycle window when the misprediction is resolved. If this extremely > rare event should occur, the result could be: > > The SPE Data Exception from the mispredicted path may be reported > erroneously if a single-precision floating-point, double-precision > floating-point or vector floating-point instruction is the second instruction > on the correct branch path. > > According to errata description, some efp instructions > which are not supposed to trigger SPE exceptions > can trigger the exceptions in this case. > However, as we haven't emulated these instructions here, > a signal will send to userspace, and userspace application would exit. > > This patch re-issue the efp instruction that we haven't emulated, > so that hardware can properly execute it again if this case happen. > > Signed-off-by: Liu Yu <yu....@freescale.com> > --- > This is an erratum workaround patch. > It would be better if the patch can go into 2.6.38. > > arch/powerpc/include/asm/reg.h | 2 + > arch/powerpc/math-emu/math_efp.c | 53 +++++++++++++++++++++++++++++++++++++- > 2 files changed, 54 insertions(+), 1 deletions(-)
applied - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
