On Mar 23, 2011, at 10:20 PM, Kushwaha Prabhakar-B32579 wrote:
>
> Hi all,
>
> I have query about usage of range field at pcie@0 under PCIe controller.
> Please find snap shot from mpc8536_36.dts..
>
> pci3: pcie@fffe0b000 {
> compatible = "fsl,mpc8548-pcie";
> device_type = "pci";
> #interrupt-cells = <1>;
> #size-cells = <2>;
> #address-cells = <3>;
> reg = <0xf 0xffe0b000 0 0x1000>;
> bus-range = <0 0xff>;
> ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
> 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
> clock-frequency = <33333333>;
> interrupt-parent = <&mpic>;
> interrupts = <27 0x2>;
> interrupt-map-mask = <0xf800 0 0 7>;
> interrupt-map = <
> /* IDSEL 0x0 */
> 0000 0 0 1 &mpic 8 1
> 0000 0 0 2 &mpic 9 1
> 0000 0 0 3 &mpic 10 1
> 0000 0 0 4 &mpic 11 1
> >;
>
> pcie@0 {
> reg = <0 0 0 0 0>;
> #size-cells = <2>;
> #address-cells = <3>;
> device_type = "pci";
> ranges = <0x02000000 0 0xe0000000 --> child/port start
> address
> 0x02000000 0 0xe0000000 --> Parent bus address
> 0 0x20000000
>
> 0x01000000 0 0x00000000
> 0x01000000 0 0x00000000
> 0 0x00100000>;
> };
> };
>
> Question:
> A) is ranges filed of pcie@0 really required?
> I just went through the code and found scan_OF_for_pci_dev() called
> from pci_busdev_to_OF_node() touches pcie@0 node. But, It does not even uses
> range filed.
>
> static struct device_node *scan_OF_for_pci_dev(struct device_node
> *parent,unsigned int devfn) {
> ---
> ---
> for_each_child_of_node(parent, np) {
> reg = of_get_property(np, "reg", &psize);
>
> ---
> ---
> if (!strcmp(np->name, "multifunc-device")) {
>
> }
>
> I also checked "Power_ePAPR_APPROVED_v1.0.pdf". It never say range filed
> required for child bus.
Part of the reason for the range is to match PCIe semantics of RC having a
transparent bridge.
>
> B) if range field of pcie@0 required. why does child/port start address same
> as Parent bus address? Range property provides mapping of port address to
> parent address space.
> So the value should be 0x00000000. Means port's address starting from
> 0x00000000 to size 0x20000000 is mapped parent's 0xe0000000.
>
> ranges = <0x02000000 0 0x00000000 --> Child/port's
> start address
> 0x02000000 0 0xe0000000 --> Parent bus
> address
> 0 0x20000000
>
> 0x01000000 0 0x00000000
> 0x01000000 0 0x00000000
> 0 0x00100000>;
because the bridge is transparent.
- k
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