On 12/07/2011 06:04 PM, Timur Tabi wrote: > + /* > + * This node is used to access the pixis via "indirect" mode, > + * which is done by writing the pixis register index to chip > + * select 0 and the value to/from chip select 1. Indirect > + * mode is the only way to access the pixis when DIU video > + * is enabled. Note that this assumes that the first column > + * of the 'ranges' property above is the chip select number. > + */ > + board-control@0,0 { > + compatible = "fsl,p1022ds-indirect-pixis"; > + reg = <0x0 0x0 1 /* CS0 */ > + 0x1 0x0 1>; /* CS1 */ > + }; [snip] > + board-control@3,0 { > + compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis"; > + reg = <3 0 0x30>; > + interrupt-parent = <&mpic>; > + /* > + * IRQ8 is generated if the "EVENT" switch is pressed > + * and PX_CTL[EVESEL] is set to 00. > + */ > + interrupts = <8 8 0 0>; > + };
It's not new to this patch, but... what does "8" mean in the second cell of an mpic interrupt specifier? And why does the indirect pixis node not have the interrupt? -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev