On Jul 10, 2012, at 4:39 AM, Sethi Varun-B16395 wrote: > > >> -----Original Message----- >> From: Kumar Gala [mailto:ga...@kernel.crashing.org] >> Sent: Tuesday, July 10, 2012 7:17 AM >> To: Wood Scott-B07421 >> Cc: Sethi Varun-B16395; Hamciuc Bogdan-BHAMCIU1; linuxppc- >> d...@lists.ozlabs.org >> Subject: Re: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt >> support. >> >> >> On Jul 9, 2012, at 3:22 PM, Scott Wood wrote: >> >>> On 07/09/2012 02:03 PM, Kumar Gala wrote: >>>> >>>> On Jul 9, 2012, at 3:47 AM, Varun Sethi wrote: >>>> >>>>> +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) { >>>> >>>> Why can't we do this during mpic_init() time? >>> >>> Are you willing to hardcode that IRQ 16 is the error interrupt, >>> without waiting to see an intspec? >> >> I'm torn, but the bit of code in mpic_host_xlate that calls >> mpic_err_int_init() is just ugly. >> >> We could consider it similar to how we assume IPIs. > [Sethi Varun-B16395] I don't understand this point. > > -Varun
Just that we don't parse the .dts to get the IPI interrupts. They are just assumed as part of being OpenPIC. So, I was suggesting if you set the MPIC_FSL_HAS_EIMR flag, we just assume the IRQ #, rather than parsing the .dts. - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev