-----Original Message-----
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Saturday, March 16, 2013 1:57 AM
To: Leekha Shaveta-B20052
Cc: linuxppc-dev@lists.ozlabs.org; Lian Minghuan-B31939; Fleming Andy-AFLEMING;
Aggrwal Poonam-B10812; Mehresh Ramneek-B31383
Subject: Re: [PATCH 2/6] powerpc/fsl-booke: Add initial B4860QDS board device
tree
On Mar 15, 2013, at 2:55 AM, Shaveta Leekha wrote:
> Signed-off-by: Shaveta Leekha <shav...@freescale.com>
> Signed-off-by: Minghuan Lian <minghuan.l...@freescale.com>
> Signed-off-by: Andy Fleming <aflem...@freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
> Signed-off-by: Ramneek Mehresh <ramneek.mehr...@freescale.com>
> Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
> ---
> arch/powerpc/boot/dts/b4860qds.dts | 178
> ++++++++++++++++++++++++++++++++++++
> 1 files changed, 178 insertions(+), 0 deletions(-) create mode 100644
> arch/powerpc/boot/dts/b4860qds.dts
>
> diff --git a/arch/powerpc/boot/dts/b4860qds.dts
> b/arch/powerpc/boot/dts/b4860qds.dts
> new file mode 100644
> index 0000000..ae6ac05
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/b4860qds.dts
> @@ -0,0 +1,178 @@
> +/*
> + * B4860DS Device Tree Source
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are
> met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written
> permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of
> +the
> + * GNU General Public License ("GPL") as published by the Free
> +Software
> + * Foundation, either version 2 of that License or (at your option)
> +any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND
> +ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> +IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> +ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE
> +FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> +DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> +SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
> +CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
> +OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
> +USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/include/ "fsl/b4860si-pre.dtsi"
> +
> +/ {
> + model = "fsl,B4860QDS";
> + compatible = "fsl,B4860QDS";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <&mpic>;
> +
> + ifc: localbus@ffe124000 {
> + reg = <0xf 0xfe124000 0 0x2000>;
> + ranges = <0 0 0xf 0xe8000000 0x08000000
> + 2 0 0xf 0xff800000 0x00010000
> + 3 0 0xf 0xffdf0000 0x00008000>;
> +
> + nor@0,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "cfi-flash";
> + reg = <0x0 0x0 0x8000000>;
> + bank-width = <2>;
> + device-width = <1>;
> + };
> +
> + nand@2,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,ifc-nand";
> + reg = <0x2 0x0 0x10000>;
> +
> + partition@0 {
> + /* This location must not be altered */
> + /* 1MB for u-boot Bootloader Image */
> + reg = <0x0 0x00100000>;
> + label = "NAND U-Boot Image";
> + read-only;
> + };
> +
> + partition@100000 {
> + /* 1MB for DTB Image */
> + reg = <0x00100000 0x00100000>;
> + label = "NAND DTB Image";
> + };
> +
> + partition@200000 {
> + /* 10MB for Linux Kernel Image */
> + reg = <0x00200000 0x00A00000>;
> + label = "NAND Linux Kernel Image";
> + };
> +
> + partition@c00000 {
> + /* 500MB for Root file System Image */
> + reg = <0x00c00000 0x1F400000>;
> + label = "NAND RFS Image";
> + };
> + };
> +
> + board-control@3,0 {
> + compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
> + reg = <3 0 0x300>;
> + };
> + };
> +
dscr nodes are missing and should be included
[SL] I don't have much idea about dcsr nodes structure and their respective
testing, also couldn't find then in T4 device tree files. I have added initial
device trees. Dcsr may be added later as updation. What do you say?
> + memory {
> + device_type = "memory";
> + };
> +
> + soc: soc@ffe000000 {
> + ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
> + reg = <0xf 0xfe000000 0 0x00001000>;
> + spi@110000 {
> + flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "sst,sst25wf040";
> + reg = <0>;
> + spi-max-frequency = <40000000>; /* input clock
> */
> + };
> + };
> +
> + sdhc@114000 {
> + status = "disabled";
> + };
> +
> + i2c@118000 {
> + eeprom@50 {
> + compatible = "at24,24c64";
> + reg = <0x50>;
> + };
> + eeprom@51 {
> + compatible = "at24,24c256";
> + reg = <0x51>;
> + };
> + eeprom@53 {
> + compatible = "at24,24c256";
> + reg = <0x53>;
> + };
> + eeprom@57 {
> + compatible = "at24,24c256";
> + reg = <0x57>;
> + };
> + rtc@68 {
> + compatible = "dallas,ds3232";
> + reg = <0x68>;
> + interrupts = <0x1 0x1 0 0>;
there is no IRQ for RTC on the board.
[SL] will remove it.
> + };
> + };
> +
> + usb@210000 {
> + dr_mode = "host";
> + phy_type = "ulpi";
> + };
> +
> + };
> +
> + pci0: pcie@ffe200000 {
> + reg = <0xf 0xfe200000 0 0x10000>;
> + ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
> + 0x01000000 0 0x00000000 0xf 0xf8000000 0x0
> 0x00010000>;
> + pcie@0 {
> + ranges = <0x02000000 0 0xe0000000
> + 0x02000000 0 0xe0000000
> + 0 0x20000000
> +
> + 0x01000000 0 0x00000000
> + 0x01000000 0 0x00000000
> + 0 0x00010000>;
> + };
> + };
> +
> + rio: rapidio@ffe0c0000 {
> + reg = <0xf 0xfe0c0000 0 0x11000>;
> +
> + port1 {
> + ranges = <0 0 0xc 0x20000000 0 0x10000000>;
> + };
> + port2 {
> + ranges = <0 0 0xc 0x30000000 0 0x10000000>;
> + };
> + };
> +
> +};
> +
> +/include/ "fsl/b4860si-post.dtsi"
> --
> 1.7.6.GIT
>
Regards,
Shaveta
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