From: Cody P Schafer <d...@codyps.com>
CC: Haren Myneni <hb...@us.ibm.com>
CC: Cody P Schafer <d...@codyps.com>
Signed-off-by: Cody P Schafer <c...@linux.vnet.ibm.com>
Signed-off-by: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com>
---
tools/perf/Documentation/perf-list.txt | 13 +++++++++++++
tools/perf/Documentation/perf-record.txt | 5 +++++
2 files changed, 18 insertions(+)
diff --git a/tools/perf/Documentation/perf-list.txt
b/tools/perf/Documentation/perf-list.txt
index 6fce6a6..626818b 100644
--- a/tools/perf/Documentation/perf-list.txt
+++ b/tools/perf/Documentation/perf-list.txt
@@ -89,6 +89,19 @@ raw encoding of 0x1A8 can be used:
You should refer to the processor specific documentation for getting these
details. Some of them are referenced in the SEE ALSO section below.
+PARAMETERIZED EVENTS
+--------------------
+
+Some pmu events listed by 'perf-list' will be displayed with '?' in them. For
+example:
+
+ hv_gpci/dtbp_ptitc,phys_processor_idx=?/
+
+This means that when provided as an event, a value for phys_processor_idx must
+also be supplied. For example:
+
+ perf stat -e 'hv_gpci/dtbp_ptitc,phys_processor_idx=0x2/' ...
+
OPTIONS
-------
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Documentation/perf-record.txt
index d460049..664f852 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -33,6 +33,11 @@ OPTIONS
- a raw PMU event (eventsel+umask) in the form of rNNN where NNN is a
hexadecimal event descriptor.
+ - a symbolicly formed PMU event like 'pmu/value1=0x3,value2/' where
+ 'value1' and 'value2' are defined as formats in
+ /sys/bus/event_sources/devices/pmu/format/* OR are one of 'config',
+ 'config1', 'config2'.
+
- a hardware breakpoint event in the form of '\mem:addr[:access]'
where addr is the address in memory you want to break in.
Access is the memory access type (read, write, execute) it can
--
1.8.3.1
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