On Jul 6, 2015, at 4:49 AM, Zidan Wang wrote:
> +static bool fsl_ssi_readable_reg(struct device *dev, unsigned int reg)
> +{
> + switch (reg) {
> + case CCSR_SSI_STX0:
> + case CCSR_SSI_STX1:
> + case CCSR_SSI_SRX0:
> + case CCSR_SSI_SRX1:
> + case CCSR_SSI_SCR:
> + case CCSR_SSI_SISR:
> + case CCSR_SSI_SIER:
> + case CCSR_SSI_STCR:
> + case CCSR_SSI_SRCR:
> + case CCSR_SSI_STCCR:
> + case CCSR_SSI_SRCCR:
> + case CCSR_SSI_SFCSR:
> + case CCSR_SSI_STR:
> + case CCSR_SSI_SOR:
> + case CCSR_SSI_SACNT:
> + case CCSR_SSI_SACADD:
> + case CCSR_SSI_SACDAT:
> + case CCSR_SSI_SATAG:
> + case CCSR_SSI_STMSK:
> + case CCSR_SSI_SRMSK:
> + case CCSR_SSI_SACCST:
> + case CCSR_SSI_SACCEN:
> + case CCSR_SSI_SACCDIS:
> + return true;
> + default:
> + return false;
> + }
> +}
This should be the other way around: return true by default, and false it is
one of the few registers that is not readable.
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