Hi Richard, I really appreciate you answering my questions so quickly. I attached my logs where I ran a patched version of ptp4l on the GM device (I also attached this patch), the patch simply binds the socket to br0 and joins the multicast group on the br0 interface instead of the eth0 interface supplied In the command. Our routes go through br0 as expected in this situation:
$ ip ro.3 224.0.0.0/4 dev br0 scope link ... And our DSA is setup as a 'dumb' switch, all unknown DA frames are flooded out all ports. Also our particular marvell switch does not have the ptp support, we are aware that some versions do. When seeing the slave adjusting its ptp clock this leads me to think everything works okay with this patch? Is this something that could be added as an option to ptp4l and merged in the future to support linux sw bridges? Thanks, Rob -----Original Message----- From: Richard Cochran <richardcoch...@gmail.com> Sent: Tuesday, June 5, 2018 9:14 AM To: Rob Cornall <rcorn...@sierrawireless.com> Cc: linuxptp-users@lists.sourceforge.net Subject: Re: [Linuxptp-users] PTP through a bridge interface On Tue, Jun 05, 2018 at 02:40:18PM +0000, Rob Cornall wrote: > I mean #2, a marvell (mv88e6xxx DSA) is used where the cpu port is connected > the imx6 ethernet controller. > > Yes It is setup as a linux software bridge via brctl. > > > We are aware that having a switch on the master will add some variation of > latency, but is it not possible to send ptp packets and receive them through > it? If you leave the switch alone, not as a DSA device, then you can use eth0 as a PTP port. Once you make eth0 the CPU port of a DSA device, you cannot use eth0 any more, and you can't use the br0 for PTP either. So your choice are: 1. Don't use DSA for the Marvell and run ptp4l on eth0. 2. Use the PTP support for the Marvel DSA device (new in Linux kernel v4.17) and run ptp4l on the external ports. HTH, Richard
SLAVE OUTPUT: $ ptp4l -s -A -H -4 -i eth0 -m & $ ptp4l[24740.751]: selected /dev/ptp0 as PTP clock ptp4l[24740.758]: driver changed our HWTSTAMP options ptp4l[24740.760]: tx_type 1 not 1 ptp4l[24740.762]: rx_filter 1 not 12 ptp4l[24740.764]: port 1: INITIALIZING to LISTENING on INITIALIZE ptp4l[24740.767]: port 0: INITIALIZING to LISTENING on INITIALIZE ptp4l[24740.768]: port 1: link up ptp4l[24741.595]: port 1: new foreign master 00143e.fffe.10842f-1 ptp4l[24745.595]: selected best master clock 00143e.fffe.10842f ptp4l[24745.598]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE ptp4l[24747.595]: master offset -22100 s0 freq -22092 path delay -16108 ptp4l[24748.596]: master offset -27841 s1 freq -27832 path delay -16104 ptp4l[24750.596]: master offset 10865 s2 freq -16967 path delay -16108 ptp4l[24750.598]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED ptp4l[24751.596]: master offset 8369 s2 freq -16203 path delay -16108 ptp4l[24752.596]: master offset 4379 s2 freq -17683 path delay -16101 ptp4l[24753.597]: master offset -2559 s2 freq -23307 path delay -15958 ptp4l[24754.597]: master offset -3097 s2 freq -24613 path delay -15958 ptp4l[24755.597]: master offset -132 s2 freq -22577 path delay -16101 ptp4l[24756.597]: master offset -753 s2 freq -23237 path delay -16104 ptp4l[24757.597]: master offset 799 s2 freq -21911 path delay -16706 ptp4l[24758.597]: master offset 716 s2 freq -21755 path delay -17351 ptp4l[24759.598]: master offset 3669 s2 freq -18587 path delay -17419 ptp4l[24760.598]: master offset -11673 s2 freq -32828 path delay -17351 MASTER OUTPUT: $ ptp4l[7573.109]: selected /dev/ptp0 as PTP clock testing printf ptp4l[7573.117]: ROBS_TAG: open_socket: binding to br0 ptp4l[7573.119]: index: 16 ptp4l[7573.121]: ROBS_TAG: open_socket: binding to br0 ptp4l[7573.123]: index: 16 ptp4l[7573.125]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[7573.127]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[7579.223]: port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES ptp4l[7579.224]: selected local clock 00143e.fffe.10842f as best master ptp4l[7579.224]: assuming the grand master role PHC2SYS ON SLAVE OUTPUT: $ phc2sys -a -r -m & $ phc2sys[24792.947]: reconfiguring after port state change phc2sys[24792.950]: selecting CLOCK_REALTIME for synchronization phc2sys[24792.952]: selecting eth0 as the master clock phc2sys[24792.954]: phc offset 56106244 s0 freq -31150 delay 4000 phc2sys[24793.955]: phc offset 56115635 s1 freq -21763 delay 4000 phc2sys[24794.955]: phc offset 4353 s2 freq -17410 delay 4000 phc2sys[24795.956]: phc offset 2186 s2 freq -18271 delay 4000 phc2sys[24796.957]: phc offset -4551 s2 freq -24352 delay 4000 phc2sys[24797.957]: phc offset -5897 s2 freq -27063 delay 4000 phc2sys[24798.958]: phc offset 1490 s2 freq -21445 delay 4000 phc2sys[24799.958]: phc offset 3896 s2 freq -18592 delay 4000 phc2sys[24800.959]: phc offset -1907 s2 freq -23227 delay 4000 phc2sys[24801.959]: phc offset -3407 s2 freq -25299 delay 4000 phc2sys[24802.960]: phc offset -905 s2 freq -23819 delay 4000 phc2sys[24803.960]: phc offset 1218 s2 freq -21967 delay 4000 phc2sys[24804.961]: phc offset 1233 s2 freq -21587 delay 4000
bind-to-bridge.diff
Description: bind-to-bridge.diff
rc-ptp4l-0.pcap
Description: rc-ptp4l-0.pcap
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