Error detection and correction has to be implemented at the storage level
(memory, disk) by adding additional bits to each data word to hold a 
checksum
for that word during a write cycle; this is used for error detection during 
a read cycle.
Additional bits are needed to support data correction. Typical pc memory
only supports error detection.

Walter

----- Original Message ----- 
From: <[email protected]>
To: <[email protected]>
Sent: Monday, April 20, 2009 9:34 AM
Subject: Re: [Liveaboard] Computer Troubles


>
> Ben,
>
>
> I have seen mentioned (or advertised) software that claims to do just 
> that.
> I thought you may know about such.  Perhaps someone on your Gazette.
>
>
> Norm
> S/V Bandersnatch
> Lying Julington Creek
> 30 07.695N 081 38.484W
>
>
>
>> the ECC circuitry masks all but catastrophic failures. I wish it
> generated some
>> kind of a warning when it has to activate progressively more often...
>

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