================
@@ -90,3 +91,64 @@ TEST_F(TestMCDisasmInstanceRISCV, TestRISCV32Instruction) {
EXPECT_FALSE(inst_sp->IsCall());
EXPECT_TRUE(inst_sp->DoesBranch());
}
+
+TEST_F(TestMCDisasmInstanceRISCV, TestOpcodeBytePrinter) {
+ ArchSpec arch("riscv32-*-linux");
+
+ const unsigned num_of_instructions = 7;
+ // clang-format off
+ uint8_t data[] = {
+ 0x41, 0x11, // addi sp, sp, -0x10
+ 0x06, 0xc6, // sw ra, 0xc(sp)
+ 0x23, 0x2a, 0xa4, 0xfe, // sw a0, -0xc(s0)
+ 0x23, 0x28, 0xa4, 0xfe, // sw a0, -0x10(s0)
+ 0x22, 0x44, // lw s0, 0x8(sp)
+
+ 0x3f, 0x00, 0x40, 0x09, // Fake 64-bit instruction
+ 0x20, 0x00, 0x20, 0x00,
+
+ 0x1f, 0x02, // 48 bit xqci.e.li rd=8 imm=0x1000
+ 0x00, 0x00,
+ 0x00, 0x10,
+ };
+ // clang-format on
+
+ // clang-format off
+ const char *expected_outputs[] = {
+ "1141",
+ "c606",
+ "fea42a23",
+ "fea42823",
+ "4422",
+ "0940003f 00200020",
+ "021f 0000 1000"
+ };
+ // clang-format on
+ const unsigned num_of_expected_outputs =
+ sizeof(expected_outputs) / sizeof(char *);
+
+ EXPECT_EQ(num_of_instructions, num_of_expected_outputs);
+
+ DisassemblerSP disass_sp;
+ Address start_addr(0x100);
+ disass_sp = Disassembler::DisassembleBytes(
+ arch, nullptr, nullptr, nullptr, nullptr, start_addr, &data,
sizeof(data),
+ num_of_instructions, false);
+
+ // If we failed to get a disassembler, we can assume it is because
+ // the llvm we linked against was not built with the riscv target,
+ // and we should skip these tests without marking anything as failing.
+ if (!disass_sp)
+ return;
----------------
DavidSpickett wrote:
This predicate is already checked in the cmake file
lldb/unittests/Disassembler/CMakeLists.txt.
Also if you could do a quick follow up to remove the check from the other test
that would be good.
https://github.com/llvm/llvm-project/pull/145793
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