ita-sc wrote:

> I read this patch while trying to keep the RVC instruction set in mind 
> because it's an interesting case to consider. Maybe the test file could have 
> a compressed instruction? The one instruction there now ends in 0b11 so I 
> don't think it will decode that way.

The test intentionally has an invalid instruction. I'll add one more test with 
compressed illegal instruction.
In current test it seems it is decoded as some 4-size instruction, as expected: 
https://godbolt.org/z/bMPf7faWW
```
addi    s0,sp,16
 .4byte 0xc58573
```


https://github.com/llvm/llvm-project/pull/90075
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