[llvm-branch-commits] [llvm] [AMDGPU] Support Wave Reduction for true-16 types - 3 (PR #194813)

[Matt Arsenault via llvm-branch-commits]

================
@@ -6886,18 +6896,24 @@ 
SITargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
                            ST.getGeneration() >= AMDGPUSubtarget::GFX12
                                ? AMDGPU::V_ADD_F64_pseudo_e64
                                : AMDGPU::V_ADD_F64_e64);
+  case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B16_t16:
+    return lowerWaveReduce(MI, *BB, *getSubtarget(), 
AMDGPU::V_AND_B16_t16_e64);
   case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B16:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_AND_B32);
   case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B32:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_AND_B32);
   case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B64:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_AND_B64);
+  case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B16_t16:
+    return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::V_OR_B16_t16_e64);
   case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B16:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_OR_B32);
   case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B32:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_OR_B32);
   case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B64:
     return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_OR_B64);
+  case AMDGPU::WAVE_REDUCE_XOR_PSEUDO_B16_t16:
+    return lowerWaveReduce(MI, *BB, *getSubtarget(), 
AMDGPU::V_XOR_B16_t16_e64);
----------------
arsenm wrote:

Why aren't these using the scalar instructions? 

https://github.com/llvm/llvm-project/pull/194813
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits