llvmorg-github-actions[bot] wrote:

<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms

Author: Johannes Doerfert (jdoerfert)

<details>
<summary>Changes</summary>

Only functions that match the "function_regex" will be instrumented, or if they 
have the instrumentation attribute.

---
Full diff: https://github.com/llvm/llvm-project/pull/196234.diff


5 Files Affected:

- (modified) llvm/include/llvm/Transforms/IPO/Instrumentor.h (+7-1) 
- (modified) llvm/lib/Transforms/IPO/Instrumentor.cpp (+20-2) 
- (modified) llvm/test/Instrumentation/Instrumentor/default_config.json (+3-1) 
- (added) llvm/test/Instrumentation/Instrumentor/function_regex.json (+26) 
- (added) llvm/test/Instrumentation/Instrumentor/function_regex.ll (+57) 


``````````diff
diff --git a/llvm/include/llvm/Transforms/IPO/Instrumentor.h 
b/llvm/include/llvm/Transforms/IPO/Instrumentor.h
index 9bd809230d14d..a5859fc20505c 100644
--- a/llvm/include/llvm/Transforms/IPO/Instrumentor.h
+++ b/llvm/include/llvm/Transforms/IPO/Instrumentor.h
@@ -355,7 +355,12 @@ struct InstrumentationConfig {
     TargetRegex = BaseConfigurationOption::getStringOption(
         *this, "target_regex",
         "Regular expression to be matched against the module target. "
-        "Only targets that match this regex will be instrumented",
+        "Only targets that match this regex will be instrumented.",
+        "");
+    FunctionRegex = BaseConfigurationOption::getStringOption(
+        *this, "function_regex",
+        "Regular expression to be matched against a function name. "
+        "Only functions that match this regex will be instrumented.",
         "");
     HostEnabled = BaseConfigurationOption::getBoolOption(
         *this, "host_enabled", "Instrument non-GPU targets", true);
@@ -419,6 +424,7 @@ struct InstrumentationConfig {
   BaseConfigurationOption *RuntimeStubsFile;
   BaseConfigurationOption *DemangleFunctionNames;
   BaseConfigurationOption *TargetRegex;
+  BaseConfigurationOption *FunctionRegex;
   BaseConfigurationOption *HostEnabled;
   BaseConfigurationOption *GPUEnabled;
 
diff --git a/llvm/lib/Transforms/IPO/Instrumentor.cpp 
b/llvm/lib/Transforms/IPO/Instrumentor.cpp
index 0265447832357..9fd04ab911135 100644
--- a/llvm/lib/Transforms/IPO/Instrumentor.cpp
+++ b/llvm/lib/Transforms/IPO/Instrumentor.cpp
@@ -154,6 +154,9 @@ class InstrumentorImpl final {
   /// The instrumentor configuration.
   InstrumentationConfig &IConf;
 
+  /// The function regex filter, if any.
+  Regex ParsedFunctionRegex;
+
   /// The underlying module.
   Module &M;
 
@@ -171,7 +174,7 @@ bool InstrumentorImpl::shouldInstrumentTarget() {
   bool RegexMatches = true;
   const auto TargetRegexStr = IConf.TargetRegex->getString();
   if (!TargetRegexStr.empty()) {
-    llvm::Regex TargetRegex(TargetRegexStr);
+    Regex TargetRegex(TargetRegexStr);
     std::string ErrMsg;
     if (!TargetRegex.isValid(ErrMsg)) {
       IIRB.Ctx.diagnose(DiagnosticInfoInstrumentation(
@@ -190,7 +193,11 @@ bool InstrumentorImpl::shouldInstrumentTarget() {
 bool InstrumentorImpl::shouldInstrumentFunction(Function &Fn) {
   if (Fn.isDeclaration())
     return false;
-  return !Fn.getName().starts_with(IConf.getRTName()) ||
+  bool RegexMatches = true;
+  const auto FunctionRegexStr = IConf.FunctionRegex->getString();
+  if (!FunctionRegexStr.empty())
+    RegexMatches = ParsedFunctionRegex.match(Fn.getName());
+  return (RegexMatches && !Fn.getName().starts_with(IConf.getRTName())) ||
          Fn.hasFnAttribute("instrument");
 }
 
@@ -274,6 +281,17 @@ bool InstrumentorImpl::instrument() {
   if (!shouldInstrumentTarget())
     return Changed;
 
+  const auto FunctionRegexStr = IConf.FunctionRegex->getString();
+  if (!FunctionRegexStr.empty()) {
+    ParsedFunctionRegex = Regex(FunctionRegexStr);
+    std::string ErrMsg;
+    if (!ParsedFunctionRegex.isValid(ErrMsg)) {
+      IIRB.Ctx.diagnose(DiagnosticInfoInstrumentation(
+          Twine("failed to parse target regex: ") + ErrMsg, DS_Warning));
+      return false;
+    }
+  }
+
   for (auto &It : IConf.IChoices[InstrumentationLocation::INSTRUCTION_PRE])
     if (It.second->Enabled)
       InstChoicesPRE[It.second->getOpcode()] = It.second;
diff --git a/llvm/test/Instrumentation/Instrumentor/default_config.json 
b/llvm/test/Instrumentation/Instrumentor/default_config.json
index 295adfe0bd96e..86b81a9568de6 100644
--- a/llvm/test/Instrumentation/Instrumentor/default_config.json
+++ b/llvm/test/Instrumentation/Instrumentor/default_config.json
@@ -7,7 +7,9 @@
     "demangle_function_names": true,
     "demangle_function_names.description": "Demangle functions names passed to 
the runtime.",
     "target_regex": "",
-    "target_regex.description": "Regular expression to be matched against the 
module target. Only targets that match this regex will be instrumented",
+    "target_regex.description": "Regular expression to be matched against the 
module target. Only targets that match this regex will be instrumented.",
+    "function_regex": "",
+    "function_regex.description": "Regular expression to be matched against a 
function name. Only functions that match this regex will be instrumented.",
     "host_enabled": true,
     "host_enabled.description": "Instrument non-GPU targets",
     "gpu_enabled": true,
diff --git a/llvm/test/Instrumentation/Instrumentor/function_regex.json 
b/llvm/test/Instrumentation/Instrumentor/function_regex.json
new file mode 100644
index 0000000000000..91435c73f0f20
--- /dev/null
+++ b/llvm/test/Instrumentation/Instrumentor/function_regex.json
@@ -0,0 +1,26 @@
+{
+  "configuration": {
+    "runtime_prefix": "__instrumentor_",
+    "function_regex": "foo|baz"
+  },
+  "instruction_pre": {
+    "load": {
+      "enabled": true,
+      "id": true
+    },
+    "store": {
+      "enabled": true,
+      "id": false
+    }
+  },
+  "instruction_post": {
+    "load": {
+      "enabled": true,
+      "id": true
+    },
+    "store": {
+      "enabled": true,
+      "id": true
+    }
+  }
+}
diff --git a/llvm/test/Instrumentation/Instrumentor/function_regex.ll 
b/llvm/test/Instrumentation/Instrumentor/function_regex.ll
new file mode 100644
index 0000000000000..29e28611aa114
--- /dev/null
+++ b/llvm/test/Instrumentation/Instrumentor/function_regex.ll
@@ -0,0 +1,57 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instrumentor 
-instrumentor-read-config-file=%S/function_regex.json -S | FileCheck %s
+
+target datalayout = 
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+
+define i32 @foo() {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    call void @__instrumentor_pre_store() #[[ATTR0:[0-9]+]]
+; CHECK-NEXT:    store i32 0, ptr [[TMP0]], align 4
+; CHECK-NEXT:    call void @__instrumentor_post_store(i32 -1) #[[ATTR0]]
+; CHECK-NEXT:    call void @__instrumentor_pre_load(i32 2) #[[ATTR0]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+; CHECK-NEXT:    call void @__instrumentor_post_load(i32 -2) #[[ATTR0]]
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+entry:
+  %0 = alloca i32, align 4
+  store i32 0, ptr %0, align 4
+  %2 = load i32, ptr %0, align 4
+  ret i32 %2
+}
+
+define i32 @bar() {
+; CHECK-LABEL: @bar(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    store i32 0, ptr [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+entry:
+  %0 = alloca i32, align 4
+  store i32 0, ptr %0, align 4
+  %2 = load i32, ptr %0, align 4
+  ret i32 %2
+}
+
+define i32 @baz() {
+; CHECK-LABEL: @baz(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    call void @__instrumentor_pre_store() #[[ATTR0]]
+; CHECK-NEXT:    store i32 0, ptr [[TMP0]], align 4
+; CHECK-NEXT:    call void @__instrumentor_post_store(i32 -3) #[[ATTR0]]
+; CHECK-NEXT:    call void @__instrumentor_pre_load(i32 4) #[[ATTR0]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+; CHECK-NEXT:    call void @__instrumentor_post_load(i32 -4) #[[ATTR0]]
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
+entry:
+  %0 = alloca i32, align 4
+  store i32 0, ptr %0, align 4
+  %2 = load i32, ptr %0, align 4
+  ret i32 %2
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/196234
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