https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/204523
This replaces the previously removed xnack-any-only feature, with the inversion xnack-on-off-modes. All pre-gfx12.5 xnack targets support the controllable mode. Ignore explicitly set xnack settings the same way as is done for xnack requests on other unsupported targets. >From 82542686c50c37497a641966a5808ef60da2602a Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Wed, 17 Jun 2026 21:16:16 +0200 Subject: [PATCH] AMDGPU: Add subtarget feature for controllable xnack modes This replaces the previously removed xnack-any-only feature, with the inversion xnack-on-off-modes. All pre-gfx12.5 xnack targets support the controllable mode. Ignore explicitly set xnack settings the same way as is done for xnack requests on other unsupported targets. --- clang/lib/Driver/ToolChains/AMDGPU.cpp | 7 +-- .../llvm/TargetParser/AMDGPUTargetParser.def | 44 +++++++++---------- .../llvm/TargetParser/AMDGPUTargetParser.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 17 ++++--- .../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 13 +++--- .../AMDGPU/target-id-xnack-always-on.ll | 22 ++++++++++ 6 files changed, 68 insertions(+), 39 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp b/clang/lib/Driver/ToolChains/AMDGPU.cpp index ddc26604a8006..b57579f135b36 100644 --- a/clang/lib/Driver/ToolChains/AMDGPU.cpp +++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp @@ -1130,9 +1130,10 @@ static bool isXnackAvailable(const llvm::Triple &TT, llvm::StringRef TargetID) { auto Features = TT.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) : llvm::AMDGPU::getArchAttrR600(ProcKind); - // If processor has xnack always on, Address sanitizer is supported - bool XnackAvailable = (Features & llvm::AMDGPU::FEATURE_XNACK_ALWAYS); - if (XnackAvailable) + // If processor has xnack but doesn't support on/off modes, xnack is always on + bool XnackAlwaysOn = (Features & llvm::AMDGPU::FEATURE_XNACK) && + !(Features & llvm::AMDGPU::FEATURE_XNACK_ON_OFF_MODES); + if (XnackAlwaysOn) return true; // Otherwise, check if xnack+ is explicitly enabled in the target ID diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def index d15fc01f30019..dcc0c28b1ee74 100644 --- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def +++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def @@ -76,7 +76,7 @@ AMDGCN_GPU_ALIAS("mullins", GK_GFX703) AMDGCN_GPU ("gfx704", GK_GFX704, ( 7, 0, 4), FEATURE_NONE) AMDGCN_GPU_ALIAS("bonaire", GK_GFX704) AMDGCN_GPU ("gfx705", GK_GFX705, ( 7, 0, 5), FEATURE_NONE) -AMDGCN_GPU ("gfx801", GK_GFX801, ( 8, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) +AMDGCN_GPU ("gfx801", GK_GFX801, ( 8, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) AMDGCN_GPU_ALIAS("carrizo", GK_GFX801) AMDGCN_GPU ("gfx802", GK_GFX802, ( 8, 0, 2), FEATURE_FAST_DENORMAL_F32) AMDGCN_GPU_ALIAS("iceland", GK_GFX802) @@ -87,22 +87,22 @@ AMDGCN_GPU_ALIAS("polaris10", GK_GFX803) AMDGCN_GPU_ALIAS("polaris11", GK_GFX803) AMDGCN_GPU ("gfx805", GK_GFX805, ( 8, 0, 5), FEATURE_FAST_DENORMAL_F32) AMDGCN_GPU_ALIAS("tongapro", GK_GFX805) -AMDGCN_GPU ("gfx810", GK_GFX810, ( 8, 1, 0), FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) +AMDGCN_GPU ("gfx810", GK_GFX810, ( 8, 1, 0), FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) AMDGCN_GPU_ALIAS("stoney", GK_GFX810) -AMDGCN_GPU ("gfx900", GK_GFX900, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx902", GK_GFX902, ( 9, 0, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx904", GK_GFX904, ( 9, 0, 4), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx906", GK_GFX906, ( 9, 0, 6), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx908", GK_GFX908, ( 9, 0, 8), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx909", GK_GFX909, ( 9, 0, 9), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx90a", GK_GFX90A, ( 9, 0, 10), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx90c", GK_GFX90C, ( 9, 0, 12), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx942", GK_GFX942, ( 9, 4, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx950", GK_GFX950, ( 9, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx1010", GK_GFX1010, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1011", GK_GFX1011, (10, 1, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1012", GK_GFX1012, (10, 1, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1013", GK_GFX1013, (10, 1, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) +AMDGCN_GPU ("gfx900", GK_GFX900, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx902", GK_GFX902, ( 9, 0, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx904", GK_GFX904, ( 9, 0, 4), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx906", GK_GFX906, ( 9, 0, 6), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx908", GK_GFX908, ( 9, 0, 8), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx909", GK_GFX909, ( 9, 0, 9), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx90a", GK_GFX90A, ( 9, 0, 10), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx90c", GK_GFX90C, ( 9, 0, 12), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx942", GK_GFX942, ( 9, 4, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx950", GK_GFX950, ( 9, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1010", GK_GFX1010, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1011", GK_GFX1011, (10, 1, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1012", GK_GFX1012, (10, 1, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1013", GK_GFX1013, (10, 1, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) AMDGCN_GPU ("gfx1030", GK_GFX1030, (10, 3, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1031", GK_GFX1031, (10, 3, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1032", GK_GFX1032, (10, 3, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) @@ -123,8 +123,8 @@ AMDGCN_GPU ("gfx1171", GK_GFX1171, (11, 7, 1), FEATURE_FAST_FMA_F32|FEAT AMDGCN_GPU ("gfx1172", GK_GFX1172, (11, 7, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1200", GK_GFX1200, (12, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1201", GK_GFX1201, (12, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) -AMDGCN_GPU ("gfx1250", GK_GFX1250, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx1251", GK_GFX1251, (12, 5, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1250", GK_GFX1250, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1251", GK_GFX1251, (12, 5, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_SRAMECC) AMDGCN_GPU ("gfx1310", GK_GFX1310, (13, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) // Generic targets return the lowest common denominator @@ -140,13 +140,13 @@ AMDGCN_GPU ("gfx1310", GK_GFX1310, (13, 1, 0), FEATURE_FAST_FMA_F32|FEAT // // TODO: Split up this API depending on its caller so // generic target handling is more obvious and less risky. -AMDGCN_GPU ("gfx9-generic", GK_GFX9_GENERIC, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx10-1-generic", GK_GFX10_1_GENERIC, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) +AMDGCN_GPU ("gfx9-generic", GK_GFX9_GENERIC, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx10-1-generic", GK_GFX10_1_GENERIC, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) AMDGCN_GPU ("gfx10-3-generic", GK_GFX10_3_GENERIC, (10, 3, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx11-generic", GK_GFX11_GENERIC, (11, 0, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx12-generic", GK_GFX12_GENERIC, (12, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) -AMDGCN_GPU ("gfx9-4-generic", GK_GFX9_4_GENERIC, ( 9, 4, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx12-5-generic", GK_GFX12_5_GENERIC, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS) +AMDGCN_GPU ("gfx9-4-generic", GK_GFX9_4_GENERIC, ( 9, 4, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx12-5-generic", GK_GFX12_5_GENERIC, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK) #undef AMDGCN_GPU #undef AMDGCN_GPU_ALIAS diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h index 7c192b36b6ec8..1288f4cd69ff0 100644 --- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h +++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h @@ -72,8 +72,8 @@ enum ArchFeatureKind : uint32_t { // WGP mode is supported. FEATURE_WGP = 1 << 9, - // Xnack is available by default - FEATURE_XNACK_ALWAYS = 1 << 10 + // Xnack on/off modes are supported. + FEATURE_XNACK_ON_OFF_MODES = 1 << 10 }; enum FeatureError : uint32_t { diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td index 524d8e8e31b1b..988d360b239de 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -207,6 +207,13 @@ def FeatureSupportsXNACK : SubtargetFeature<"xnack-support", "Hardware supports XNACK" >; +defm XNACKOnOffModes : AMDGPUSubtargetFeature<"xnack-on-off-modes", + "Target supports XNACK on/off modes", + /*GenPredicate=*/1, + /*GenAssemblerPredicate=*/0, + [FeatureSupportsXNACK] +>; + // XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support // XNACK. The current default kernel driver setting is: // - graphics ring: XNACK disabled @@ -1498,7 +1505,7 @@ def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9", FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts, FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts, FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16, - FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK, + FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureXNACKOnOffModes, FeatureUnalignedBufferAccess, FeatureUnalignedScratchAccess, FeatureUnalignedDSAccess, FeatureNegativeScratchOffsetBug, FeatureGWS, FeatureDefaultComponentZero,FeatureVmemWriteVgprInOrder, FeatureVMemToLDSLoad, @@ -1678,7 +1685,7 @@ def FeatureISAVersion8_0_1 : FeatureSet< !listconcat(FeatureISAVersion8_0_Common.Features, [FeatureFastFMAF32, FeatureHalfRate64Ops, - FeatureSupportsXNACK])>; + FeatureXNACKOnOffModes])>; def FeatureISAVersion8_0_2 : FeatureSet< !listconcat(FeatureISAVersion8_0_Common.Features, @@ -1695,7 +1702,7 @@ def FeatureISAVersion8_0_5 : FeatureSet< def FeatureISAVersion8_1_0 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount16, - FeatureSupportsXNACK, + FeatureXNACKOnOffModes, FeatureImageStoreD16Bug, FeatureImageGather4D16Bug]>; @@ -1890,7 +1897,7 @@ def FeatureISAVersion10_1_Common : FeatureSet< FeatureMadMacF32Insts, FeatureDsSrc2Insts, FeatureLDSMisalignedBug, - FeatureSupportsXNACK, + FeatureXNACKOnOffModes, // gfx101x bugs FeatureVcmpxPermlaneHazard, FeatureVMEMtoScalarWriteHazard, @@ -2196,7 +2203,6 @@ def FeatureISAVersion12_50_Common : FeatureSet< FeatureSetPrioIncWgInst, FeatureSWakeupBarrier, Feature45BitNumRecordsBufferResource, - FeatureSupportsXNACK, FeatureXNACK, FeatureClusters, FeatureD16Writes32BitVgpr, @@ -2261,6 +2267,7 @@ def FeatureISAVersion12_5_Generic: FeatureSet< [FeatureAddressableLocalMemorySize327680, FeatureSetregVGPRMSBFixup, FeatureRequiresCOV6, + FeatureSupportsXNACK, FeatureGFX125xLowestRateWMMA, FeatureTransCoexecutionHazard])>; diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index c57a3728ead69..db3c76402d32b 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -1100,13 +1100,12 @@ VOPD::InstInfo getVOPDInstInfo(unsigned VOPDOpcode, namespace IsaInfo { AMDGPUTargetID::AMDGPUTargetID(const MCSubtargetInfo &STI) - : STI(STI), XnackSetting(TargetIDSetting::Any), - SramEccSetting(TargetIDSetting::Any) { - if (!STI.getFeatureBits().test(FeatureSupportsXNACK)) - XnackSetting = TargetIDSetting::Unsupported; - if (!STI.getFeatureBits().test(FeatureSupportsSRAMECC)) - SramEccSetting = TargetIDSetting::Unsupported; -} + : STI(STI), XnackSetting(STI.getFeatureBits().test(FeatureXNACKOnOffModes) + ? TargetIDSetting::Any + : TargetIDSetting::Unsupported), + SramEccSetting(STI.getFeatureBits().test(FeatureSupportsSRAMECC) + ? TargetIDSetting::Any + : TargetIDSetting::Unsupported) {} void AMDGPUTargetID::setTargetIDFromFeaturesString(StringRef FS) { // Check if xnack or sramecc is explicitly enabled or disabled. In the diff --git a/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll b/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll new file mode 100644 index 0000000000000..13d13c875b8aa --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll @@ -0,0 +1,22 @@ +; gfx1250, gfx1251, and gfx12-5-generic have xnack always on because they don't +; support on/off modes (no FeatureXNACKOnOffModes). The target ID should not +; include xnack modifiers regardless of -mattr settings. + +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic < %s | FileCheck --check-prefix=CHECK %s + +; Even with -mattr=+xnack or -mattr=-xnack, the target ID doesn't change +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic -mattr=-xnack < %s | FileCheck %s + +; CHECK: .amdgcn_target "amdgcn-amd-amdhsa--gfx{{1250|1251|12-5-generic}}" + +define void @func0() { +entry: + ret void +} _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
