https://github.com/vikramRH updated https://github.com/llvm/llvm-project/pull/203511
>From ef019cc854a54c3d610ed310b04e2de65212e9f3 Mon Sep 17 00:00:00 2001 From: vikhegde <[email protected]> Date: Fri, 12 Jun 2026 16:49:11 +0530 Subject: [PATCH] [NPM] Make few more passes Required --- llvm/include/llvm/CodeGen/MachineBlockPlacement.h | 2 +- llvm/include/llvm/CodeGen/RegisterCoalescerPass.h | 2 +- llvm/include/llvm/CodeGen/RenameIndependentSubregs.h | 2 +- llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h | 2 +- llvm/include/llvm/CodeGen/UnreachableBlockElim.h | 4 ++-- llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h | 2 +- llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 8 ++++---- llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h | 2 +- llvm/lib/Target/AMDGPU/GCNNSAReassign.h | 2 +- llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h | 2 +- llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h | 2 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h | 2 +- llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h | 2 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.h | 2 +- llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 2 +- llvm/lib/Target/AMDGPU/SILowerWWMCopies.h | 2 +- llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h | 2 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.h | 2 +- 20 files changed, 24 insertions(+), 24 deletions(-) diff --git a/llvm/include/llvm/CodeGen/MachineBlockPlacement.h b/llvm/include/llvm/CodeGen/MachineBlockPlacement.h index 0ffdad1ea2e6f..6b764801ca616 100644 --- a/llvm/include/llvm/CodeGen/MachineBlockPlacement.h +++ b/llvm/include/llvm/CodeGen/MachineBlockPlacement.h @@ -14,7 +14,7 @@ namespace llvm { class MachineBlockPlacementPass - : public RequiredPassInfoMixin<MachineBlockPlacementPass> { + : public OptionalPassInfoMixin<MachineBlockPlacementPass> { bool AllowTailMerge = true; diff --git a/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h index fa2d65df3b093..e5b6d8216daa0 100644 --- a/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h +++ b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h @@ -13,7 +13,7 @@ namespace llvm { class RegisterCoalescerPass - : public OptionalPassInfoMixin<RegisterCoalescerPass> { + : public RequiredPassInfoMixin<RegisterCoalescerPass> { public: LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h b/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h index 3cb10129ff700..694652615adf4 100644 --- a/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h +++ b/llvm/include/llvm/CodeGen/RenameIndependentSubregs.h @@ -14,7 +14,7 @@ namespace llvm { class RenameIndependentSubregsPass - : public OptionalPassInfoMixin<RenameIndependentSubregsPass> { + : public RequiredPassInfoMixin<RenameIndependentSubregsPass> { public: LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h index 1eca8ca39bab3..05491f7c23f31 100644 --- a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h +++ b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h @@ -14,7 +14,7 @@ namespace llvm { class TwoAddressInstructionPass - : public OptionalPassInfoMixin<TwoAddressInstructionPass> { + : public RequiredPassInfoMixin<TwoAddressInstructionPass> { public: LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/include/llvm/CodeGen/UnreachableBlockElim.h b/llvm/include/llvm/CodeGen/UnreachableBlockElim.h index 79b1b0ceb091a..b7f22dc24acc0 100644 --- a/llvm/include/llvm/CodeGen/UnreachableBlockElim.h +++ b/llvm/include/llvm/CodeGen/UnreachableBlockElim.h @@ -28,13 +28,13 @@ namespace llvm { class UnreachableBlockElimPass - : public OptionalPassInfoMixin<UnreachableBlockElimPass> { + : public RequiredPassInfoMixin<UnreachableBlockElimPass> { public: LLVM_ABI PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); }; class UnreachableMachineBlockElimPass - : public OptionalPassInfoMixin<UnreachableMachineBlockElimPass> { + : public RequiredPassInfoMixin<UnreachableMachineBlockElimPass> { public: LLVM_ABI PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM); diff --git a/llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h b/llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h index a84e766c220ba..50d95fd83cc7b 100644 --- a/llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h +++ b/llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h @@ -12,7 +12,7 @@ #include "llvm/IR/PassManager.h" namespace llvm { -struct StructurizeCFGPass : OptionalPassInfoMixin<StructurizeCFGPass> { +struct StructurizeCFGPass : RequiredPassInfoMixin<StructurizeCFGPass> { private: bool SkipUniformRegions; diff --git a/llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h b/llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h index 3095de8b26a21..c304ff912bb5e 100644 --- a/llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h +++ b/llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h @@ -13,7 +13,7 @@ namespace llvm { -class UnifyLoopExitsPass : public OptionalPassInfoMixin<UnifyLoopExitsPass> { +class UnifyLoopExitsPass : public RequiredPassInfoMixin<UnifyLoopExitsPass> { public: LLVM_ABI PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); }; diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h index e4367811f1ed4..c72fa69aa1419 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.h +++ b/llvm/lib/Target/AMDGPU/AMDGPU.h @@ -92,7 +92,7 @@ struct AMDGPUUseNativeCallsPass PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); }; -class SILowerI1CopiesPass : public OptionalPassInfoMixin<SILowerI1CopiesPass> { +class SILowerI1CopiesPass : public RequiredPassInfoMixin<SILowerI1CopiesPass> { public: SILowerI1CopiesPass() = default; PreservedAnalyses run(MachineFunction &MF, @@ -354,7 +354,7 @@ class AMDGPULateCodeGenPreparePass }; class AMDGPULowerKernelArgumentsPass - : public OptionalPassInfoMixin<AMDGPULowerKernelArgumentsPass> { + : public RequiredPassInfoMixin<AMDGPULowerKernelArgumentsPass> { private: TargetMachine &TM; @@ -411,7 +411,7 @@ class AMDGPUAnnotateUniformValuesPass PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); }; -class SIModeRegisterPass : public OptionalPassInfoMixin<SIModeRegisterPass> { +class SIModeRegisterPass : public RequiredPassInfoMixin<SIModeRegisterPass> { public: SIModeRegisterPass() = default; PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM); @@ -516,7 +516,7 @@ class AMDGPURewriteUndefForPHIPass }; class SIAnnotateControlFlowPass - : public OptionalPassInfoMixin<SIAnnotateControlFlowPass> { + : public RequiredPassInfoMixin<SIAnnotateControlFlowPass> { private: const AMDGPUTargetMachine &TM; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h index 3eab914207183..9c0bf932a21f8 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h @@ -26,7 +26,7 @@ namespace llvm { class AMDGPUUnifyDivergentExitNodesPass - : public OptionalPassInfoMixin<AMDGPUUnifyDivergentExitNodesPass> { + : public RequiredPassInfoMixin<AMDGPUUnifyDivergentExitNodesPass> { public: PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); }; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h b/llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h index 12ea858c54dd8..987d5027b889e 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h @@ -14,7 +14,7 @@ namespace llvm { class AMDGPUWaitSGPRHazardsPass - : public OptionalPassInfoMixin<AMDGPUWaitSGPRHazardsPass> { + : public RequiredPassInfoMixin<AMDGPUWaitSGPRHazardsPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h index d466dd1522f07..942da80f1b776 100644 --- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h +++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h @@ -12,7 +12,7 @@ #include "llvm/CodeGen/MachinePassManager.h" namespace llvm { -class GCNNSAReassignPass : public OptionalPassInfoMixin<GCNNSAReassignPass> { +class GCNNSAReassignPass : public RequiredPassInfoMixin<GCNNSAReassignPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h index 6bf8b0c3d0da8..a3ed88811781f 100644 --- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h +++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h @@ -13,7 +13,7 @@ namespace llvm { class GCNPreRALongBranchRegPass - : public OptionalPassInfoMixin<GCNPreRALongBranchRegPass> { + : public RequiredPassInfoMixin<GCNPreRALongBranchRegPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h index bd8327c51cc60..9213fc1cb19ca 100644 --- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h +++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h @@ -13,7 +13,7 @@ namespace llvm { class GCNRewritePartialRegUsesPass - : public OptionalPassInfoMixin<GCNRewritePartialRegUsesPass> { + : public RequiredPassInfoMixin<GCNRewritePartialRegUsesPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h index 73e079466a02e..e5a3cd40ea21c 100644 --- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h +++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h @@ -13,7 +13,7 @@ namespace llvm { -class SIFixSGPRCopiesPass : public OptionalPassInfoMixin<SIFixSGPRCopiesPass> { +class SIFixSGPRCopiesPass : public RequiredPassInfoMixin<SIFixSGPRCopiesPass> { public: SIFixSGPRCopiesPass() = default; PreservedAnalyses run(MachineFunction &MF, diff --git a/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h b/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h index 2e61f9773f6f5..e7c6c3610db09 100644 --- a/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h +++ b/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h @@ -12,7 +12,7 @@ #include "llvm/CodeGen/MachinePassManager.h" namespace llvm { -class SIFixVGPRCopiesPass : public OptionalPassInfoMixin<SIFixVGPRCopiesPass> { +class SIFixVGPRCopiesPass : public RequiredPassInfoMixin<SIFixVGPRCopiesPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.h b/llvm/lib/Target/AMDGPU/SILowerControlFlow.h index 8b0df82d06720..cae9aaf3fc39d 100644 --- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.h +++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.h @@ -13,7 +13,7 @@ namespace llvm { class SILowerControlFlowPass - : public OptionalPassInfoMixin<SILowerControlFlowPass> { + : public RequiredPassInfoMixin<SILowerControlFlowPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h index 60b4907bc2031..a16464d3b0d3b 100644 --- a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h +++ b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h @@ -13,7 +13,7 @@ namespace llvm { class SILowerSGPRSpillsPass - : public OptionalPassInfoMixin<SILowerSGPRSpillsPass> { + : public RequiredPassInfoMixin<SILowerSGPRSpillsPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h b/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h index 8cd1554c360de..41a0eb15030aa 100644 --- a/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h +++ b/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h @@ -13,7 +13,7 @@ namespace llvm { class SILowerWWMCopiesPass - : public OptionalPassInfoMixin<SILowerWWMCopiesPass> { + : public RequiredPassInfoMixin<SILowerWWMCopiesPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h index 1bfc49acd420a..8d3fa21035966 100644 --- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h +++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h @@ -14,7 +14,7 @@ namespace llvm { class SIPreAllocateWWMRegsPass - : public OptionalPassInfoMixin<SIPreAllocateWWMRegsPass> { + : public RequiredPassInfoMixin<SIPreAllocateWWMRegsPass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h index f1c86811e5736..ce8308561a5a7 100644 --- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h +++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h @@ -12,7 +12,7 @@ #include "llvm/CodeGen/MachinePassManager.h" namespace llvm { -class SIWholeQuadModePass : public OptionalPassInfoMixin<SIWholeQuadModePass> { +class SIWholeQuadModePass : public RequiredPassInfoMixin<SIWholeQuadModePass> { public: PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM); 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