https://github.com/chinmaydd updated https://github.com/llvm/llvm-project/pull/220051
>From 90eb92c94d069ccdb033674e063494e1899bc7f2 Mon Sep 17 00:00:00 2001 From: Chinmay Deshpande <[email protected]> Date: Thu, 3 Sep 2026 01:36:06 -0400 Subject: [PATCH] [AMDGPU] Add getLDSAllocGranule to TargetParser Expose the LDS allocation granule from GPUKind and subarch without an MCSubtargetInfo. Use the dedicated granularity features and consolidate backend users on the byte-valued query. Change-Id: Ic0c9345e7657ec3c6978a646628598cb7608b390 --- .../llvm/TargetParser/AMDGPUTargetParser.h | 4 +++ llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 7 +++-- llvm/lib/Target/AMDGPU/GCNSubtarget.cpp | 4 +-- .../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 14 ---------- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 5 ---- llvm/lib/TargetParser/AMDGPUTargetParser.cpp | 28 +++++++++++++++++++ .../TargetParser/TargetParserTest.cpp | 16 +++++++++++ 7 files changed, 54 insertions(+), 24 deletions(-) diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h index 3f74320675d12..c2743d13cef89 100644 --- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h +++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h @@ -203,6 +203,10 @@ getMaxHWAddressableLocalMemorySize(Triple::SubArchType SubArch); LLVM_ABI unsigned getLDSBankCount(GPUKind AK); LLVM_ABI unsigned getLDSBankCount(Triple::SubArchType SubArch); +/// \returns LDS allocation granularity in bytes. +LLVM_ABI unsigned getLDSAllocGranule(GPUKind AK); +LLVM_ABI unsigned getLDSAllocGranule(Triple::SubArchType SubArch); + /// \returns Number of SIMDs a work-group's waves run on. All four SIMDs of the /// functional block in full-SIMD mode, half of them otherwise. constexpr unsigned getNumWorkGroupSIMDs(bool FullSIMDMode) { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 11c482c83f1e1..b68ab01173721 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -1440,7 +1440,8 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo, ProgInfo.LDSSize = MFI->getLDSSize(); - unsigned LDSGranularityBytes = getLdsDwGranularity(STM) * 4; + unsigned LDSGranularityBytes = + AMDGPU::getLDSAllocGranule(STM.getTargetID().getGPUKind()); ProgInfo.LDSBlocks = alignTo(ProgInfo.LDSSize, LDSGranularityBytes) / LDSGranularityBytes; @@ -1679,8 +1680,8 @@ static void EmitPALMetadataCommon(AMDGPUPALMetadata *MD, MD->updateHwStageMaximum( CC, ".lds_size", - (unsigned)(CurrentProgramInfo.LdsSize * getLdsDwGranularity(ST) * - sizeof(uint32_t))); + (unsigned)(CurrentProgramInfo.LdsSize * + AMDGPU::getLDSAllocGranule(ST.getTargetID().getGPUKind()))); } // This is the equivalent of EmitProgramInfoSI above, but for when the OS type diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp index 9443420c3d424..e97f2114098b8 100644 --- a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp @@ -184,9 +184,9 @@ GCNSubtarget &GCNSubtarget::initializeSubtargetDependencies(const Triple &TT, LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(*this); AddressableLocalMemorySize = AMDGPU::IsaInfo::getAddressableLocalMemorySize(*this); - // LDS Allocation Granularity calculated in bytes from dwords + // LDS allocation granularity is in bytes. LDSAllocationGranularity = - AMDGPU::getLdsDwGranularity(*this) * sizeof(uint32_t); + AMDGPU::getLDSAllocGranule(getTargetID().getGPUKind()); HasFminFmaxLegacy = getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS; HasSMulHi = getGeneration() >= AMDGPUSubtarget::GFX9; diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 3f83a873b3a0b..c38fff3e623a0 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -3660,20 +3660,6 @@ bool isDPALU_DPP(const MCInstrDesc &OpDesc, const MCInstrInfo &MII, return hasAny64BitVGPROperands(OpDesc, MII, ST); } -unsigned getLdsDwGranularity(const MCSubtargetInfo &ST) { - if (ST.getFeatureBits().test(FeatureLDSAllocGranularity256)) - return 64; - if (ST.getFeatureBits().test(FeatureLDSAllocGranularity512)) - return 128; - if (ST.getFeatureBits().test(FeatureLDSAllocGranularity1024)) - return 256; - if (ST.getFeatureBits().test(FeatureLDSAllocGranularity1280)) - return 320; - if (ST.getFeatureBits().test(FeatureLDSAllocGranularity2048)) - return 512; - return 64; -} - bool isPackedSingleSGPRFP32Inst(unsigned Opc) { switch (Opc) { case AMDGPU::V_PK_ADD_F32_gfx1250: diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h index 6f875db59917e..d8b882218e72a 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h @@ -1780,11 +1780,6 @@ getVGPRLoweringOperandTables(const MCInstrDesc &Desc); /// \returns true if a memory instruction supports scale_offset modifier. bool supportsScaleOffset(const MCInstrInfo &MII, unsigned Opcode); -/// \returns lds block size in terms of dwords. \p -/// This is used to calculate the lds size encoded for PAL metadata 3.0+ which -/// must be defined in terms of bytes. -unsigned getLdsDwGranularity(const MCSubtargetInfo &ST); - class ClusterDimsAttr { public: enum class Kind { Unknown, NoCluster, VariableDims, FixedDims }; diff --git a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp index e89d17918d3ff..e38575674d7bb 100644 --- a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp +++ b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp @@ -485,6 +485,34 @@ unsigned AMDGPU::getLDSBankCount(Triple::SubArchType SubArch) { return getLDSBankCount(getGPUKindFromSubArch(SubArch)); } +unsigned AMDGPU::getLDSAllocGranule(GPUKind AK) { + const AMDGPUFeatureBitset &Features = getFeatureBitset(AK); + if (Features.none()) + return 256; + assert((Features.test(FEAT_LDS_ALLOC_GRANULARITY_256) || + Features.test(FEAT_LDS_ALLOC_GRANULARITY_512) || + Features.test(FEAT_LDS_ALLOC_GRANULARITY_1024) || + Features.test(FEAT_LDS_ALLOC_GRANULARITY_1280) || + Features.test(FEAT_LDS_ALLOC_GRANULARITY_2048)) && + "missing LDS allocation granularity feature"); + if (Features.test(FEAT_LDS_ALLOC_GRANULARITY_256)) + return 256; + if (Features.test(FEAT_LDS_ALLOC_GRANULARITY_512)) + return 512; + if (Features.test(FEAT_LDS_ALLOC_GRANULARITY_1024)) + return 1024; + if (Features.test(FEAT_LDS_ALLOC_GRANULARITY_1280)) + return 1280; + if (Features.test(FEAT_LDS_ALLOC_GRANULARITY_2048)) + return 2048; + + return 256; +} + +unsigned AMDGPU::getLDSAllocGranule(Triple::SubArchType SubArch) { + return getLDSAllocGranule(getGPUKindFromSubArch(SubArch)); +} + unsigned AMDGPU::getMaxWavesPerEU(GPUKind AK) { const GPUInfo *Info = getAMDGPUInfo(AK); return Info ? Info->MaxWavesPerEU : 10; diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 4dfaaa12b49d7..4aaf8d28769a3 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -3266,6 +3266,22 @@ TEST(TargetParserTest, testAMDGPUgetMaxHWAddressableLocalMemorySize) { 327680u); } +TEST(TargetParserTest, testAMDGPUgetLDSAllocGranule) { + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX600), 256u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX900), 512u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX950), 1280u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX1310), 1024u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX1250), 2048u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_GFX9_4_GENERIC), 1280u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(AMDGPU::GK_NONE), 256u); + + EXPECT_EQ(AMDGPU::getLDSAllocGranule(Triple::AMDGPUSubArch600), 256u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(Triple::AMDGPUSubArch900), 512u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(Triple::AMDGPUSubArch950), 1280u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(Triple::AMDGPUSubArch1310), 1024u); + EXPECT_EQ(AMDGPU::getLDSAllocGranule(Triple::AMDGPUSubArch1250), 2048u); +} + TEST(TargetParserTest, testAMDGPUgetNumWorkGroupSIMDs) { EXPECT_EQ(AMDGPU::getNumWorkGroupSIMDs(true), 4u); EXPECT_EQ(AMDGPU::getNumWorkGroupSIMDs(false), 2u); _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
