Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.329 -> 1.330
---
Log message:
Enclose some variables in a scope to avoid error with some gcc versions
---
Diffs of the changes: (+3 -2)
LegalizeDAG.cpp | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.329
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.330
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.329 Tue Mar 21 15:02:03 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 21 18:12:37 2006
@@ -859,7 +859,7 @@
}
break;
- case ISD::VEXTRACT_VECTOR_ELT:
+ case ISD::VEXTRACT_VECTOR_ELT: {
// We know that operand #0 is the Vec vector. If the index is a constant
// or if the invec is a supported hardware type, we can use it. Otherwise,
// lower to a store then an indexed load.
@@ -897,10 +897,11 @@
// It's now an extract from the appropriate high or low part.
Result = LegalizeOp(DAG.UpdateNodeOperands(Result, Tmp1, Tmp2));
} else {
- // FIXME: IMPLEMENT STORE/LOAD lowering.
+ // FIXME: IMPLEMENT STORE/LOAD lowering. Need alignment of stack slot!!
assert(0 && "unimp!");
}
break;
+ }
case ISD::CALLSEQ_START: {
SDNode *CallEnd = FindCallEndFromCallStart(Node);
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