Jeff Barlow wrote:
[..] It seems fairly obvious to me though that inserting extra code in the ISR path that inspect some globals only to figure out that it is indeed in an ISR will have an adverse effect on latency.
I might be picky here, but using C instead of assembler tends o have an advers effect on latency, too. ;-)
What I mean is personally, I don' think it's good design to expose the ISR/non-ISR fact accross layers of the code that possibly have nothing to do with that knowledge.
Keeping my private view aside, is there a requirement to add "fromISR" code in the port layer? If so, now would be the best time!
For some of us this makes the difference between a working system and one that almost works.
To be hones, I still can't believe ~3 cycles (load a global "bool", test, jump) make a difference here, compared to running the task scheduler when leaving the interrupt... Additionally, e.g. Cortex-M systems wouldn't even really need the info when the scheduler is run from lowest-prio interrupt level anyway...
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