Hello,
I've been using Marss for a few days and would like to simulate a more
sophisticated machine than those that are included in the original
default.conf configuration. I found the "Machine Configuration" page
on the Marss website that describes how to edit the machine
configuration files:
http://marss86.org/index.php?title=Machine_Configuration. However,
when using the example configuration from the bottom of that web page,
or any of my own created machine configurations that try to use an L3
cache, I am getting errors from Marss. These are the steps to
reproduce the problem (on my Core 2 Duo machine running Ubuntu 12.04):
> git clone git://github.com/avadhpatel/marss.git
> cd marss
> rm -f config/atom_core.conf config/default.conf config/moesi.conf
> config/ooo_core.conf
> edit config/example.conf:
Copy example configuration from bottom of this page:
http://marss86.org/index.php?title=Machine_Configuration
> scons c=2
> edit test.cfg:
-machine heterogeneous
-bench-name test
-stats test.stats
-logfile test.log
-loglevel 10
> qemu/qemu-system-x86_64 -hda /path/to/ubuntu-kvm-natty-amd64.raw -m 1024
> -simconfig test.cfg
My disk image contains a 64-bit Ubuntu 11.04 distribution, and I see
the output "Simulator is now waiting for a 'run' command" in my
terminal. In the emulated system I now run a program that switches to
simulation mode, and I see the following output:
PTLCALL type PTLCALL_ENQUEUE
MARSSx86::Command received : -run
Completed 0 cycles, 0 commits: 0 Hz, 0
Completed 461000 cycles, 0 commits: 2302454 Hz, 0
Completed 927000 cycles, 0 commits: 2329693 Hz, 0
insns/sec: rip ffffffff8109c080 ffffffff8100c980[vcpu 0] thread 0:
WARNING: At cycle 1048577, 0 user commits: no instructions have
committed for 1048577 cycles; the pipeline could be deadlocked
qemu-system-x86_64: ptlsim/build/core/ooo-core/ooo.cpp:876: bool
ooo::OooCore::runcycle(void*): Assertion `0' failed.
Aborted (core dumped)
If I perform the same steps but don't remove the default config files
and use the default "shared_l2" or "private_L2" machines, then the
simulation runs fine with my test program. I have also created a
different machine configuration with an L3 cache (attempting to
simulate an 8-core Intel Xeon processor) that causes a segfault in
Marss during the simulation.
I'm not sure if this issue is a bug in Marss or a problem due to a bad
machine configuration. If somebody can take a look and offer any
advice, that would be great. The steps that I've included should
hopefully make it easy to reproduce this issue, but I can gladly post
my example.conf file, my other 8-core config file, test.log output, or
anything else that would be helpful.
Also, if anybody has a working machine configuration with an L3 cache
or an 8-core configuration and can post it, that would also be
excellent (I looked around the mailing list archives a bit for
something like this, but failed to find anything); if I can at least
get my hands on a configuration that works, then I can hopefully tweak
it to something close to the processor that I'm trying to simulate.
Thanks,
Peter
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