On Tue, Sep 25, 2012 at 5:36 AM, shuchang <[email protected]> wrote:

> Hi all,
>
> I want to store the memory data in LLC. However I am not sure when the
> data is
> updated in QEMU correspondingly. If the data is modified in LLC in ptlsim,
> is it
> modified in QEMU simultaneously?
>
> In simulation caches, we do not store any data. You'll have to add 'data'
field into
cache line.  In order to keep it upto date you'll need to send the data
with memory-
request object, which is used to perform read/writes in on-chip caches.


> Considering the lifetime of a cache block in LLC which has been modified
> several
> times before evicted to the main memory:
>
> 1. cache_insert_cb() function first inserts the data block from the main
> memory
> into the cache.
>
> Yes, but as I mentioned earlier, no data so just simulate the timing.


> So I can use context::loadvirt() function here to load the original data.
> (namely old_data)
>
> Well, once a 'store' operation is committed in core pipeline, it updates
QEMU's
memory so when you call loadvirt, if no data is updated in QEMU then you'll
get old
data, else it will be new data.


> 2.  send_update_message():
>
> Before it is evicted, it use send_update_message() to update the main
> memory. SO
> I can use context::loadvirt() function again to get the latest data in main
> memory (namely new_data). Am I right?
>
> Yes. Here it will work because send update will be generated after the
fact that core
has committed 'store' operation. So 'loadvirt' will read the most
up-to-date data.

However, I found that the new_data is always the same as the old_data.
> So I wonder when the memory data is written in QEMU actually? (corresponds
> to
> the ptlsim function)
>
> Data in QEMU is written on each 'store' commit.  As we don't simulate data
into
caches, (in order to make things little easier) you'll have to add data
filed to store
old data into cache and update them on write backs or updates.

- Avadh

>
>
>
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