avadh patel <avadh4all <at> gmail.com> writes: > > > On Tue, Sep 25, 2012 at 5:36 AM, shuchang <ShuShang.Shan <at> amd.com> wrote: > > Hi all, > I want to store the memory data in LLC. However I am not sure when the data is > updated in QEMU correspondingly. If the data is modified in LLC in ptlsim, is it > modified in QEMU simultaneously? > > In simulation caches, we do not store any data. You'll have to add 'data' field into > cache line. In order to keep it upto date you'll need to send the data with memory- > > request object, which is used to perform read/writes in on-chip caches. > > > Considering the lifetime of a cache block in LLC which has been modified several > times before evicted to the main memory: > 1. cache_insert_cb() function first inserts the data block from the main memory > into the cache. > > Yes, but as I mentioned earlier, no data so just simulate the timing. > > > So I can use context::loadvirt() function here to load the original data. > (namely old_data) > > Well, once a 'store' operation is committed in core pipeline, it updates QEMU's > memory so when you call loadvirt, if no data is updated in QEMU then you'll get old > > > data, else it will be new data. > > > 2. send_update_message(): > Before it is evicted, it use send_update_message() to update the main memory. SO > I can use context::loadvirt() function again to get the latest data in main > memory (namely new_data). Am I right? > > Yes. Here it will work because send update will be generated after the fact that core > has committed 'store' operation. So 'loadvirt' will read the most up-to- date data. > > > > However, I found that the new_data is always the same as the old_data. > So I wonder when the memory data is written in QEMU actually? (corresponds to > the ptlsim function) > > Data in QEMU is written on each 'store' commit. As we don't simulate data into > caches, (in order to make things little easier) you'll have to add data filed to store > > old data into cache and update them on write backs or updates. > > - Avadh > > > _______________________________________________http://www.marss86.org > Marss86-Devel mailing listMarss86-Devel <at> cs.binghamton.eduhttps://www.cs.binghamton.edu/mailman/listinfo/marss86- devel > > > > > > <div> > <br><br><div class="gmail_quote">On Tue, Sep 25, 2012 at 5:36 AM, shuchang <span dir="ltr"><<a href="mailto:ShuShang.Shan <at> amd.com" target="_blank">ShuShang.Shan <at> amd.com</a>></span> wrote:<br> <blockquote class="gmail_quote"> > > Hi all,<br><br> > I want to store the memory data in LLC. However I am not sure when the data is<br> > updated in QEMU correspondingly. If the data is modified in LLC in ptlsim, is it<br> > modified in QEMU simultaneously?<br><br> > </blockquote> > <div>In simulation caches, we do not store any data. You'll have to add 'data' field into</div> > <div>cache line. In order to keep it upto date you'll need to send the data with memory-</div> > > <div>request object, which is used to perform read/writes in on-chip caches.</div> > <div> </div> > <blockquote class="gmail_quote"> > Considering the lifetime of a cache block in LLC which has been modified several<br> > times before evicted to the main memory:<br><br> > 1. cache_insert_cb() function first inserts the data block from the main memory<br> > into the cache.<br><br> > </blockquote> > <div>Yes, but as I mentioned earlier, no data so just simulate the timing.</div> > <div> </div> > <blockquote class="gmail_quote"> > So I can use context::loadvirt() function here to load the original data. <br> > (namely old_data)<br><br> > </blockquote> > <div>Well, once a 'store' operation is committed in core pipeline, it updates QEMU's</div> > <div>memory so when you call loadvirt, if no data is updated in QEMU then you'll get old</div> > <div> > > data, else it will be new data.</div> > <div> </div> > <blockquote class="gmail_quote"> > 2. send_update_message():<br><br> > Before it is evicted, it use send_update_message() to update the main memory. SO<br> > I can use context::loadvirt() function again to get the latest data in main<br> > memory (namely new_data). Am I right?<br><br> > </blockquote> > <div>Yes. Here it will work because send update will be generated after the fact that core</div> > <div>has committed 'store' operation. So 'loadvirt' will read the most up-to-date data. </div> > > <div><br></div> > <blockquote class="gmail_quote"> > However, I found that the new_data is always the same as the old_data. <br> > So I wonder when the memory data is written in QEMU actually? (corresponds to<br> > the ptlsim function)<br><br> > </blockquote> > <div>Data in QEMU is written on each 'store' commit. As we don't simulate data into</div> > <div>caches, (in order to make things little easier) you'll have to add data filed to store</div> > > <div>old data into cache and update them on write backs or updates.</div> > <div><br></div> > <div>- Avadh </div> > <blockquote class="gmail_quote"> > <br><br><br> > _______________________________________________<br><a href="http://www.marss86.org"; target="_blank">http://www.marss86.org</a> <br> > Marss86-Devel mailing list<br><a href="mailto:Marss86-Devel <at> cs.binghamton.edu">Marss86-Devel <at> cs.binghamton.edu</a><br><a href="https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel"; target="_blank">https://www.cs.binghamton.edu/mailman/listinfo/marss86- devel</a><br> > </blockquote> > </div> > <br> > </div> >
I am trying to do something similar to original post above. Mainly, get the physical address and the data when a write back occurs from the Last Level Cache (LLC). There are a couple files in marss/ptlsim/ that I think I could modify to print out the physical address upon a memory request (mainly memoryController.cpp). But I am having trouble finding where the last level cache's write backs are simulated. Let me know what you think. _______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
