Hello all, I want to simulate Intel Clovertown processor (Its schema is shown at following) by MARSS. [image: Inline image 2] Two packages exist in Clovertown and each package is composed of two cores and on shared L2 cache. I created clovertown.conf file which simulates Clovertown CPU (The configure file has been attached). I found that "disable_snoop" of split_bus interconnection must be set true, else simulation doesn't work properly. Now, there is a question. If bus snoop is disabled, will D-caches and L2's remain coherent? If your answer is negative, how I can correctly implement this architecture?
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clovertown.conf
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