From: Rajesh Poornachandran <[email protected]>

GL3 PM - Enable GL3 if any of the GFX sub-systems is turned ON
and disable GL3 only if all GFX sub-systems are turned OFF.

Signed-off-by: Rajesh Poornachandran <[email protected]>
Signed-off-by: Hitesh K. Patel <[email protected]>
---
 drivers/staging/mrst/drv/psb_powermgmt.c |   55 ++++++++++++++++++++++-------
 drivers/staging/mrst/drv/psb_powermgmt.h |    3 +-
 2 files changed, 43 insertions(+), 15 deletions(-)

diff --git a/drivers/staging/mrst/drv/psb_powermgmt.c 
b/drivers/staging/mrst/drv/psb_powermgmt.c
index 4af853c..9795fac 100644
--- a/drivers/staging/mrst/drv/psb_powermgmt.c
+++ b/drivers/staging/mrst/drv/psb_powermgmt.c
@@ -1548,6 +1548,11 @@ static void ospm_suspend_pci(struct pci_dev *pdev)
 
        /*printk(KERN_ALERT "ospm_suspend_pci\n");*/
 
+#ifdef CONFIG_MDFD_GL3
+       // Power off GL3 after all GFX sub-systems are powered off.
+       ospm_power_island_down(OSPM_GL3_CACHE_ISLAND);
+#endif
+
        pci_save_state(pdev);
        pci_read_config_dword(pdev, 0x5C, &bsm);
        dev_priv->saveBSM = bsm;
@@ -1593,6 +1598,14 @@ static bool ospm_resume_pci(struct pci_dev *pdev)
        else
                gbSuspended = false;
 
+#ifdef CONFIG_MDFD_GL3
+       if(!ret){
+               // Powerup GL3 - can be used by any GFX-sub-system.
+               ospm_power_island_up(OSPM_GL3_CACHE_ISLAND);
+
+       }
+#endif
+
        return !gbSuspended;
 }
 #endif
@@ -1679,11 +1692,13 @@ void ospm_power_island_up(int hw_islands)
 
        if (IS_MID(gpDrmDevice) && 
                (hw_islands & (OSPM_GRAPHICS_ISLAND | OSPM_VIDEO_ENC_ISLAND |
-                      OSPM_VIDEO_DEC_ISLAND))) {
+                      OSPM_VIDEO_DEC_ISLAND | OSPM_GL3_CACHE_ISLAND))) {
 
                pwr_cnt = inl(dev_priv->apm_base + PSB_APM_CMD);
 
                pwr_mask = 0;
+
+
                if (hw_islands & OSPM_GRAPHICS_ISLAND) {
                        if (IS_MDFLD(gpDrmDevice) && dev_priv->platform_rev_id 
!= MDFLD_PNW_A0) {
                                pwr_cnt &= ~PSB_PWRGT_GFX_MASK_B0;
@@ -1692,19 +1707,25 @@ void ospm_power_island_up(int hw_islands)
                                pwr_cnt &= ~PSB_PWRGT_GFX_MASK;
                                pwr_mask |= PSB_PWRGT_GFX_MASK;
                        }
-            #ifdef OSPM_STAT
-            if (dev_priv->graphics_state == PSB_PWR_STATE_OFF) {
-                dev_priv->gfx_off_time += (jiffies - 
dev_priv->gfx_last_mode_change) * 1000 / HZ;
-                dev_priv->gfx_last_mode_change = jiffies;
-                dev_priv->graphics_state = PSB_PWR_STATE_ON;
-                dev_priv->gfx_on_cnt++;
-            }
-            #endif
+                       #ifdef OSPM_STAT
+                       if (dev_priv->graphics_state == PSB_PWR_STATE_OFF) {
+                               dev_priv->gfx_off_time += (jiffies - 
dev_priv->gfx_last_mode_change) * 1000 / HZ;
+                               dev_priv->gfx_last_mode_change = jiffies;
+                               dev_priv->graphics_state = PSB_PWR_STATE_ON;
+                               dev_priv->gfx_on_cnt++;
+                       }
+                       #endif
+               }
+               if (hw_islands & OSPM_GL3_CACHE_ISLAND) {
+                       if (IS_MDFLD(gpDrmDevice) && dev_priv->platform_rev_id 
!= MDFLD_PNW_A0) {
+                               pwr_cnt &= ~PSB_PWRGT_GL3_MASK;
+                               pwr_mask |= PSB_PWRGT_GL3_MASK;
+                       }
                }
                if (hw_islands & OSPM_VIDEO_ENC_ISLAND) {
                        if (IS_MDFLD(gpDrmDevice) && dev_priv->platform_rev_id 
!= MDFLD_PNW_A0) {
-                               pwr_cnt &= ~(PSB_PWRGT_VID_ENC_MASK | 
PSB_PWRGT_GL3_MASK);
-                               pwr_mask |= (PSB_PWRGT_VID_ENC_MASK | 
PSB_PWRGT_GL3_MASK);
+                               pwr_cnt &= ~PSB_PWRGT_VID_ENC_MASK;
+                               pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
                        } else {
                                pwr_cnt &= ~PSB_PWRGT_VID_ENC_MASK;
                                pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
@@ -1712,8 +1733,8 @@ void ospm_power_island_up(int hw_islands)
                }
                if (hw_islands & OSPM_VIDEO_DEC_ISLAND) {
                        if (IS_MDFLD(gpDrmDevice) && dev_priv->platform_rev_id 
!= MDFLD_PNW_A0) {
-                               pwr_cnt &= ~(PSB_PWRGT_VID_DEC_MASK | 
PSB_PWRGT_GL3_MASK);
-                               pwr_mask |= (PSB_PWRGT_VID_DEC_MASK | 
PSB_PWRGT_GL3_MASK);
+                               pwr_cnt &= ~PSB_PWRGT_VID_DEC_MASK;
+                               pwr_mask |= PSB_PWRGT_VID_DEC_MASK;
                        } else {
                                pwr_cnt &= ~PSB_PWRGT_VID_DEC_MASK;
                                pwr_mask |= PSB_PWRGT_VID_DEC_MASK;
@@ -1829,6 +1850,12 @@ void ospm_power_island_down(int islands)
         }
         #endif
        }
+       if (islands & OSPM_GL3_CACHE_ISLAND) {
+               if (IS_MDFLD(gpDrmDevice) && dev_priv->platform_rev_id != 
MDFLD_PNW_A0) {
+                       pwr_cnt |= PSB_PWRGT_GL3_MASK;
+                       pwr_mask |= PSB_PWRGT_GL3_MASK;
+               }
+       }
        if (islands & OSPM_VIDEO_ENC_ISLAND) {
                pwr_cnt |= PSB_PWRGT_VID_ENC_MASK;
                pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
@@ -1839,7 +1866,7 @@ void ospm_power_island_down(int islands)
        }
        if (pwr_cnt) {
                pwr_cnt |= inl(dev_priv->apm_base);
-               outl(pwr_cnt, dev_priv->apm_base);
+               outl(pwr_cnt, dev_priv->apm_base  + PSB_APM_CMD);
                while (true) {
                    pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
 
diff --git a/drivers/staging/mrst/drv/psb_powermgmt.h 
b/drivers/staging/mrst/drv/psb_powermgmt.h
index bb2f230..4f7e634 100644
--- a/drivers/staging/mrst/drv/psb_powermgmt.h
+++ b/drivers/staging/mrst/drv/psb_powermgmt.h
@@ -36,7 +36,8 @@
 #define OSPM_VIDEO_ENC_ISLAND  0x2
 #define OSPM_VIDEO_DEC_ISLAND  0x4
 #define OSPM_DISPLAY_ISLAND    0x8
-#define OSPM_ALL_ISLANDS       0xf
+#define OSPM_GL3_CACHE_ISLAND  0x10
+#define OSPM_ALL_ISLANDS       0x1f
 
 /* IPC message and command defines used to enable/disable mipi panel voltages 
*/
 #define IPC_MSG_PANEL_ON_OFF    0xE9
-- 
1.7.1

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