On Fri, 23 Apr 1999, Steinar H. Gunderson wrote:
> On Thu, Apr 22, 1999 at 04:16:54PM -0700, Mersenne Digest wrote:
> >Well, my assumption is that GCC doesn't do 64-bit... I wish I were a Ultra
> >guru like the one that did the DES port for Distributed.net... that thing
> >flies! I was getting > 24Million keys/sec on just that one Quad machine...
> >The Quad Xeons were only getting 16 Million... :P
>
> Give me an UltraSPARC, and I'll promise to learn its asm ;-) Well, I guess
> gcc _should_ do 64-bit, if the code itself knows about it (ie. uses `int'
> and assumes it's 64 bits).
>
gcc won't use 64-bit data types on the Ultra (except floating point).
egcs will, but I haven't used it. gcc actually generates terrible
code for the UltraSPARC series...its authors apparently never bothered
with code generation for better than a sparc 2.
Also, I've found that an Ultra of a certain speed is usually equivalent
to a Pentium II of about twice the megahertz. The key-cracking engine
is so fast because modern ultras have a version of MMX that can do much
more in the way of logical ops, works completely in parallel with the
integer unit, and has 32 registers to play with. x86 could have been
like this, which makes me sad.
> I think the idea of WinCE on microwaves is even more wacky. Imagine your
> microwave crashing...
>
Were you the guy on the RC5 list that wanted key cracking engines for
things like laser printers and Furbees? Man, I thought *I* was strange.
(PS: I looked in a postscript guide; RC5 would be *real* tough to do :)
> >I'd like to see if I can get the FFT code to multithread tho. That'd be
> >cool... Test single prime faster at least, but I don't know if there are any
> >parallel FFT algorithms... Pointers anyone?
>
> I'm not sure if it would really be worth it. Lots of extra programming pain
> and CPU intercommunication (which is slow), for no real increase in computing
> speed.
There are several standard tricks for computing an FFT in parallel. The
seminal paper in the field is Bailey's "FFTs in External and Hierarchical
Memory", available on the web somewhere. On an SMP with separate caches
the parallel methods would probably rock'n'roll.
jasonp
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