On 28 Nov 00, at 14:48, xqrpa wrote:
> for the SiSoft Sandra Memory benchmark for this marvel, delivering 3X the
> performance of anything else tested.
>
> I'm no Intel booster, preferring Atthlon hands down, but a 400MHz FSB is
> no slouch, methinks, when it delivers numbers like the above. Will this
> benefit Prime95? Anybody?
Memory bandwidth _should_ be the dominant factor, especially when
running LL tests on largish exponents, where the processor cache size
is only a small fraction of the working set. However the fact remains
that Athlon systems running with PC100 memory seem to significantly
outperform PIII systems running with the same memory at the same
clock speed. One can infer that the performance of the Athlon FPU is
superior _for our particular application_, though the increase in the
FSB (bandwidth between CPU and chipset) certainly does no harm!
I've also been disappointed by the performance of RDRAM with PIII
systems; though my PIII 700 (i820 chipset) system did speed up about
10% when SDRAM was exchanged for RDRAM, it's _still_ 33% slower than
my (old type) Athlon 650 system.
Someone told me that RDRAM works better in pairs, but the single
modules are still so expensive that I haven't been tempted to try the
experiment.
> two things that don't work with UPX are executables that want to
> read data
> from themselves and things with "overlays". (And, of course,
> executables
> that want to _write_ to themselves), but for everything else it
> almost
> always works and is transparent.
Unfortunately for UPX, Prime95's assembler routines write to the code
segment. This is used to tune routines for performance between
processor types without "bloat" caused by duplicating large sections
of code or incurring inefficiencies caused by executing test/branch
instructions repeatedly.
Regards
Brian Beesley
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