Module: Mesa Branch: main Commit: 3ad9a6e7c202dd98ccfa2004a53c164640e31a57 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ad9a6e7c202dd98ccfa2004a53c164640e31a57
Author: Samuel Pitoiset <[email protected]> Date: Thu Feb 2 14:24:45 2023 +0100 radv: simplify an assertion after considering RADV_FORCE_VRS Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068> --- src/amd/vulkan/radv_pipeline.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index ab2440e1ec1..a618cd33d44 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3584,9 +3584,7 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, /* Force per-vertex VRS. */ if (radv_consider_force_vrs(pipeline, noop_fs, stages)) { - assert(pipeline->last_vgt_api_stage == MESA_SHADER_VERTEX || - pipeline->last_vgt_api_stage == MESA_SHADER_TESS_EVAL || - pipeline->last_vgt_api_stage == MESA_SHADER_GEOMETRY); + assert(pipeline->last_vgt_api_stage != MESA_SHADER_MESH); nir_shader *last_vgt_shader = stages[pipeline->last_vgt_api_stage].nir; NIR_PASS(_, last_vgt_shader, radv_force_primitive_shading_rate, device); }
