Module: Mesa Branch: main Commit: 49a867f67e16a746f615a7aff6a6e99e8a8a57a8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=49a867f67e16a746f615a7aff6a6e99e8a8a57a8
Author: Francisco Jerez <[email protected]> Date: Wed Aug 3 16:47:52 2022 -0700 intel/fs: Add support for vector payload values to fetch_payload_reg(). This extends fetch_payload_reg() to support fetching vector registers like barycentrics stored on the payload as a contiguous sequence of SIMD-wide vectors. In the SIMD32 case, both halves of the SIMD16 vector registers specified as regs[0] and regs[1] are zipped to construct a single SIMD32-wide vector. Reviewed-by: Caio Oliveira <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606> --- src/intel/compiler/brw_fs.cpp | 17 ++++++++++------- src/intel/compiler/brw_fs.h | 3 ++- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index c38cb17ac9c..6924aebbcd6 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -8335,23 +8335,26 @@ bool brw_should_print_shader(const nir_shader *shader, uint64_t debug_flag) namespace brw { fs_reg fetch_payload_reg(const brw::fs_builder &bld, uint8_t regs[2], - brw_reg_type type) + brw_reg_type type, unsigned n) { if (!regs[0]) return fs_reg(); if (bld.dispatch_width() > 16) { - const fs_reg tmp = bld.vgrf(type); + const fs_reg tmp = bld.vgrf(type, n); const brw::fs_builder hbld = bld.exec_all().group(16, 0); const unsigned m = bld.dispatch_width() / hbld.dispatch_width(); - fs_reg components[2]; - assert(m <= 2); + fs_reg *const components = new fs_reg[m * n]; - for (unsigned g = 0; g < m; g++) - components[g] = retype(brw_vec8_grf(regs[g], 0), type); + for (unsigned c = 0; c < n; c++) { + for (unsigned g = 0; g < m; g++) + components[c * m + g] = + offset(retype(brw_vec8_grf(regs[g], 0), type), hbld, c); + } - hbld.LOAD_PAYLOAD(tmp, components, m, 0); + hbld.LOAD_PAYLOAD(tmp, components, m * n, 0); + delete[] components; return tmp; } else { diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index ab29e86dc1e..c7af424c8fc 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -574,7 +574,8 @@ private: namespace brw { fs_reg fetch_payload_reg(const brw::fs_builder &bld, uint8_t regs[2], - brw_reg_type type = BRW_REGISTER_TYPE_F); + brw_reg_type type = BRW_REGISTER_TYPE_F, + unsigned n = 1); fs_reg fetch_barycentric_reg(const brw::fs_builder &bld, uint8_t regs[2]);
