Module: Mesa Branch: master Commit: 7d4213fe88a5398fa1624615780decf113d44359 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d4213fe88a5398fa1624615780decf113d44359
Author: Rob Clark <robdcl...@chromium.org> Date: Thu Oct 10 19:36:30 2019 -0700 freedreno/ir3: force i/j pixel to r0.x It seems that pre-fs texture fetch only works if ij_pix ends up in r0.x. I've tried unknown zero bits, to no avail, and blob also seems to force r0.x when this feature is used. Signed-off-by: Rob Clark <robdcl...@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsb...@google.com> --- src/freedreno/ir3/ir3_compiler_nir.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 38c60f8cfe6..5b1adf29e3d 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -3211,6 +3211,28 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, ctx->primitive_id->regs[0]->num = 1; struct ir3_instruction *precolor[] = { ctx->gs_header, ctx->primitive_id }; ret = ir3_ra(so, precolor, ARRAY_SIZE(precolor)); + } else if (so->num_sampler_prefetch) { + assert(so->type == MESA_SHADER_FRAGMENT); + struct ir3_instruction *precolor[2]; + int idx = 0; + + for (unsigned i = 0; i < ir->ninputs; i++) { + struct ir3_instruction *instr = ctx->ir->inputs[i]; + + if (!instr) + continue; + + if (instr->input.sysval != SYSTEM_VALUE_BARYCENTRIC_PIXEL) + continue; + + assert(idx < ARRAY_SIZE(precolor)); + + precolor[idx] = instr; + instr->regs[0]->num = idx; + + idx++; + } + ret = ir3_ra(so, precolor, idx); } else { ret = ir3_ra(so, NULL, 0); } _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit