URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de30a7ae6ea3d1fa90977229bc71afed595a4d5d
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 19:31:49 2020 -0500
pan/bi: Fix Android.mk
Files listed in Makefile.sources did not exist, this affects the android
build for other drivers as well.
[Patch by Tapani manually cherrypicked into this branch]
Signed-off-by: Tapani Pälli <tapani.pa...@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b0be49005bf7d66d8f8fc8a9bb39dd5e29ab243
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 19:27:25 2020 -0500
pan/bi: Rename next-wait to simply 'wait'
next-wait is from a quirk of packing that the dependency indices are
"off by one"; we don't emulate this quirk in the IR since it's easy
enough to patch over in the disassembler. Let's not confuse anybody with
it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b329f8c750af96f9efb968045dcf03b0fad1b34e
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 19:25:00 2020 -0500
pan/bi: Add dummy scheduler
Do the absolute simplest possible thing -- create a clause for every
instruction, and just pick whichever slot we can, nopping the other,
copying whatever constant we have whether it's used or not.
To be clear - this is not to be used in a production compiler. But this
lets actual bundles and clauses show up in the BIR, which unblocks work
on final code generation and packing (which can happen more or less in
parallel to NIR->BIR, optimization, register allocation, and writing an
actual scheduling).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51e537c9fa4d10bc5b065a60095bf2d85080d3c5
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 16:29:35 2020 -0500
pan/bi: Implement load_const
In the laziest possible way... We can just emit worst case moves which
DCE will eat for breakfast anyway, and inline constants on instructions
where that is supported directly. This approach eliminates a lot of
nasty corner cases that Midgard's crazy cache scheme has hit, at the
expense of slightly more work for DCE (but it's only a single iteration
of an O(N) pass that has to run anyway..)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ead0d3488bba096bd697048edf85470d1c5cf20
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:52:09 2020 -0500
pan/bi: Add preliminary LOAD_UNIFORM implementation
Lots of things are missing (indirect access, UBOs) but we have this
stubbed out for now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=48910e83889a0736f61aca7c4b196d7c6420db9a
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:44:19 2020 -0500
pan/bi: Implement store_vary for vertex shaders
As far as I/O goes, these four should hold us over for a while.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d86659ca57ebe9d1752e33ed6ffe1e1b70c5f50d
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:43:43 2020 -0500
pan/bi: Add helpers for creating temporaries
Also from Midgard, adapted to our addressing scheme.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=59b476e11adf1ad2ddfc597a8f742fb23fd1ab80
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:33:52 2020 -0500
pan/bi: Implement load_input for vertex shaders
Corresponds to a single LD_ATTR instruction, easy enough.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dabb6c6b9fd473b10ae9d63b96e7ef248b1a7ed1
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:26:44 2020 -0500
pan/bi: Implement store_output for fragment shaders
Corresponds to a BLEND instruction, possibly preceded by an ATEST
instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79c1af062341266d7ad64a0ac221394d6cbfdfdc
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:26:20 2020 -0500
pan/bi: Add bi_schedule_barrier helper
Copypaste from Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=92a4f26e7f5249df3cb853b3a8cd9e726690d66c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 6 09:25:58 2020 -0500
pan/bi: Add blend_location to IR for BI_BLEND
To specify which render target is being written.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07671826658dfc90ead2773c864a2ba3460a97e2
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 17:50:18 2020 -0500
pan/bi: Implement nir_intrsinic_load_interpolated_input
Enough for basic varying reads.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=806533ba7ff9d52583d6340b9b2b3c1212d77d79
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 17:49:45 2020 -0500
pan/bi: Fix destination printing
It should get the same treatment as sources to handle SSA/reg/etc.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=65c8dcca3b35a482c8378e10bb245a92e2e2bfdf
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 17:10:46 2020 -0500
pan/bi: Handle jumps (breaks, continues)
Loops should behave reasonably now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=987aea14000ce6524b12d72488dc1275d5e8a991
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 17:03:53 2020 -0500
pan/bi: Handle loops when ingesting CFG
Not very useful without also handling breaks and continues, of course.
We use the strategy from v3d (vir_to_nir) instead of Midgard's, since
the latter is mildly insane. I mean, it passes deqp but...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a00cf3d1efe336e09906d87a8f5a50cbbe10fd6
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 16:45:16 2020 -0500
pan/bi: Add support for if-else blocks
Branch lowering code lifted from Midgard as usual.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=977a38c87f5816828fa42d1da02626d69ba1662f
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 16:52:29 2020 -0500
pan/bi: Call nir_lower_io_to_temporaries in cmdline
Normally mesa/st would do this for us, but we're using the standalone
compiler (in advance of having the hardware) and need this pass
particularly for fragment writeout.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55dab92073f14a9b9c42175af9ddc210277bca5e
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 16:44:49 2020 -0500
pan/bi: Add instruction emit/remove helpers
As we start descending into code generation these will be of interest.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fd22c3bbd781ce497304c1270f367b1cd5fd14c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 16:33:09 2020 -0500
pan/bi: Print branch target
...if it's present, anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e9b5f8ef4b80e57c9653fcdc5e0867e9dd338a6
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 16:30:58 2020 -0500
pan/bi: Don't print types for unconditional branches
There's nothing to type!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c7ee8a9746b1ae7d852b1ae3e5408378547c156
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 10:28:13 2020 -0500
pan/bi: Improve block printing
Skip predecessor printing if there are none and match a missing brace,
also fixup the spacing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=83c4562503cc96ee04d873ee5c814e43b9e61b56
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 10:25:19 2020 -0500
pan/bi: Walk through the NIR control flow graph
Copypaste from Midgard with some cleanups. That seems to be a trend
these days. Hopefully boilerplate will come to a close soon.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d29184f6985b5e88c3a32526850acd7c8f3ab46
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 5 10:11:39 2020 -0500
pan/bi: Lower and optimize NIR
Pretty much a copypaste from Midgard except where architectural
decisions diverge around vectorization. On that note, we will need our
own ALU scalarization pass at some point (or rather we'll need to extend
nir_lower_alu_scalar) to allow partial lowering for 8/16-bit ops. I.e.
we'll approximately need to lower
vec4 16 ssa_2 = fadd ssa_0, ssa_1
to
vec2 16 ssa_2 = fadd ssa_0.xy, ssa_1.xy
vec2 16 ssa_3 = fadd ssa_0.zw, ssa_1.zw
vec4 16 ssa_4 = vec4 ssa_2.x, ssa_2.y, ssa_3.x, ssa_4
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4097>
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