URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9d549ff8837b488f76981f23fa56c42164ee683
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 21:19:43 2020 -0400
pan/bi: Pack csel4 opcodes
These are pretty straightforward but there's a lot of details to keep
straight. In the IR, we keep a general logical comparator and types
separately; in the hardware, the type gets fused with a (much more)
limited number of comparators. So there's a fair bit of code here to
account for these differences, fusing in the type information, and
changing up argument order as necessary to make it actually correct.
Anything to save a bit!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Tested-by: Marge Bot
<https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cdc31abd63302e3da82a1bfee625019e818fc3f
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 21:19:14 2020 -0400
pan/bi: Default csel to "!= 0" mode
This way we always have regular csel conditions instead of a weird
.always special case for 3-src CSEL mode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46f526eb1e4a3ca2d7f04c50f61523a680c383a4
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 20:54:24 2020 -0400
pan/bi: Use bi_lookup_immediate when packing
This gets us part of the way there to packing lo/hi separately. A little
more work is needed to do this "properly", but hey.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11bccb0564d9e24e50238fb257dd6f724ec31712
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 18:42:58 2020 -0400
pan/bi: Respect shift when printing immediates
We allow packing multiple immediates in, but we were missing this in the
print.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f786ed10b14ca054e299679af2bfbe8a2dcd5c3
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 18:13:49 2020 -0400
pan/bi: Implement csel fusing
When generating csel instructions, we can peak to see what condition is
being used. If we're using a "nice" condition, we can fuse it in with
the csel itself, ideally letting the condition itself be DCE'd away.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a02c871f2367abf7d87569819d7ae4ebb1336d4
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 18:12:31 2020 -0400
pan/bi: Add `soft` NIR->BIR condition translation
We would like to use this routine opportunistically when fusing
conditions into csels and branches, so let's add a mode where we don't
abort.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd7fec782edd3c6d2e154994c15ceee65c3c0dc9
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 17:41:34 2020 -0400
pan/bi: Remove hacks for 1-bit booleans in IR
Now that we lower them away, a bunch of special cases disappear.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12299dead7ee589ee4a84af6058762381ef44c2c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 17:37:47 2020 -0400
pan/bi: Lower bool to ints
Currently we lower to int32, but once mediump lands we'll be ready for
that too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1097c69087d0a9a0ce3548550232f6475d18ac43
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Sat Mar 21 15:25:54 2020 -0400
pan/bi: Pack LD_ATTR
Also requires the usual R61/62 games.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0be1116b818edd56351d0415172015771eea1f44
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 12:39:29 2020 -0400
pan/bi: Pack st_vary
This should let varying writes go through finally.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9213b2520cdafefbb83f8f495281b0db419f85a8
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 12:38:53 2020 -0400
pan/bi: Add store_channels property
It can't be inferred from the usual writemask since stores don't write
to a register destination.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c57ac9d1368e83ce001be4439c73473529e48135
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 12:38:08 2020 -0400
pan/bi: Generalize data register setting
So we can use it for stores too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9458b017a946778ef5d065bfd61c47dafdfe3e94
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 12:25:08 2020 -0400
pan/bi: Flesh out st_vary IR
We need to make the semantics of BI_VECTOR a bit more precise -
vectorize only the first argument, not all of them. This is enough for
current and future users, as far as I know.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=409e4f8a49094a60354656a40cd23e38362e9a67
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 12:16:10 2020 -0400
pan/bi: Pack ld_var_addr
Choo choo.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7321a17c6abcd23a281cc4209562f919b61e7cc5
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 11:52:43 2020 -0400
pan/bi: Pack ld_ubo ops
Routes some infrastructure to do so at least slightly generically but
we'll see.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=908341ea3fecbb80f070e31e1368d01194a05df4
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 11:52:33 2020 -0400
pan/bi: Add bi_load32_components helper
Pattern seems to crop up a lot.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8bb16138b658ea7eb5dfaf023463ae78f173de0e
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Fri Mar 20 11:38:21 2020 -0400
pan/bi: Include UBO index for sysval reads
Trivially zero.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc0b49bb2cae9a0c8074faff680ddc91c8dd4bfe
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 22:43:06 2020 -0400
pan/bi: Index out constants in instructions
We rewrite BIR_INDEX_CONSTANT (and _ZERO) to preassigned constant ports
when assign uniform_const for the bundle. There are a lot of issues
raised here, unfortunately, and the implementation here is woefully
incomplete with a nasty hack for loads... nevertheless, it's somewhere
to start.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2d0de962ed385fd4dc71bf6d142c233b6d0998b
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 22:05:24 2020 -0400
pan/bi: Document constant related errata(?)
We're not totally sure what's up with this but Connor says if you
violate it Bad Things happen in your shader. I think this might be an
issue affecting early Bifrost (G71, ..?); when we know more we can look
into patching in a fix.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb590a98d2bc29e6b3fb0792d804d76904af6603
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 21:45:18 2020 -0400
pan/bi: Pack a constant quadword
The piping isn't there to make use of it yet, but this stubs out
constant support at the clause level.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=50d3f4df452d870858ed5165eb917921273f241f
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 17:21:49 2020 -0400
pan/bi: Add move lowering pass
We need ALU mostly scalarized, but we get vector moves created from
lower_vec_to_mov so let's scalarize that ourselves rather than bother
NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=58a51c49bbf48e92a78355401a07fd3870c1746c
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 17:21:34 2020 -0400
pan/bi: Add bi_emit_before helper
For BIR lowering passes.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b7077efda9a8b518c7f55f497504a031c623e54
Author: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Date: Thu Mar 19 16:58:48 2020 -0400
pan/bi: Implement FMA/MOV without modifiers
We split off MOV from FMOV since the canonical move on Bifrost doesn't
accept modifiers. (We can still do fmov, but with something like add-0.)
This will also make copyprop a little nicer, I think. Anyway, the
non-modifier version we can implement as-is for FMA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzw...@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4276>
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