This was copy'n'paste from the fragment shader, and didn't make sense
here.
---
.../drivers/dri/i965/brw_vec4_reg_allocate.cpp | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index d5fd21d..7039553 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -63,7 +63,6 @@ vec4_visitor::reg_allocate_trivial()
}
}
- /* Note that compressed instructions require alignment to 2 registers. */
hw_reg_mapping[0] = this->first_non_payload_grf;
next = hw_reg_mapping[0] + this->virtual_grf_sizes[0];
for (i = 1; i < this->virtual_grf_count; i++) {
--
1.7.5.4
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