From: Marek Olšák <marek.ol...@amd.com>
s/emit/build/
---
src/amd/common/ac_llvm_build.c | 299 ++++++++++-----------
src/amd/common/ac_llvm_build.h | 58 ++--
src/amd/common/ac_nir_to_llvm.c | 208 +++++++-------
src/gallium/drivers/radeonsi/si_shader.c | 52 ++--
src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 16 +-
.../drivers/radeonsi/si_shader_tgsi_setup.c | 2 +-
6 files changed, 317 insertions(+), 318 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 6364657..a9dc51b 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -71,23 +71,23 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,
LLVMContextRef context)
args[0] = LLVMConstReal(ctx->f32, 2.5);
ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
"amdgpu.uniform", 14);
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
}
LLVMValueRef
-ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name,
- LLVMTypeRef return_type, LLVMValueRef *params,
- unsigned param_count, unsigned attrib_mask)
+ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
+ LLVMTypeRef return_type, LLVMValueRef *params,
+ unsigned param_count, unsigned attrib_mask)
{
LLVMValueRef function, call;
bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
!(attrib_mask & AC_FUNC_ATTR_LEGACY);
function = LLVMGetNamedFunction(ctx->module, name);
if (!function) {
LLVMTypeRef param_types[32], function_type;
unsigned i;
@@ -198,23 +198,23 @@ ac_build_gather_values_extended(struct ac_llvm_context
*ctx,
LLVMValueRef
ac_build_gather_values(struct ac_llvm_context *ctx,
LLVMValueRef *values,
unsigned value_count)
{
return ac_build_gather_values_extended(ctx, values, value_count, 1,
false);
}
LLVMValueRef
-ac_emit_fdiv(struct ac_llvm_context *ctx,
- LLVMValueRef num,
- LLVMValueRef den)
+ac_build_fdiv(struct ac_llvm_context *ctx,
+ LLVMValueRef num,
+ LLVMValueRef den)
{
LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
if (!LLVMIsConstant(ret))
LLVMSetMetadata(ret, ctx->fpmath_md_kind,
ctx->fpmath_md_2p5_ulp);
return ret;
}
/* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
* of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
@@ -229,41 +229,41 @@ struct cube_selection_coords {
static void
build_cube_intrinsic(struct ac_llvm_context *ctx,
LLVMValueRef in[3],
struct cube_selection_coords *out)
{
LLVMBuilderRef builder = ctx->builder;
if (HAVE_LLVM >= 0x0309) {
LLVMTypeRef f32 = ctx->f32;
- out->stc[1] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
+ out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
f32, in, 3, AC_FUNC_ATTR_READNONE);
- out->stc[0] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
+ out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
f32, in, 3, AC_FUNC_ATTR_READNONE);
- out->ma = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
+ out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
f32, in, 3, AC_FUNC_ATTR_READNONE);
- out->id = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
+ out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
f32, in, 3, AC_FUNC_ATTR_READNONE);
} else {
LLVMValueRef c[4] = {
in[0],
in[1],
in[2],
LLVMGetUndef(LLVMTypeOf(in[0]))
};
LLVMValueRef vec = ac_build_gather_values(ctx, c, 4);
LLVMValueRef tmp =
- ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube",
- LLVMTypeOf(vec), &vec, 1,
- AC_FUNC_ATTR_READNONE);
+ ac_build_intrinsic(ctx, "llvm.AMDGPU.cube",
+ LLVMTypeOf(vec), &vec, 1,
+ AC_FUNC_ATTR_READNONE);
out->stc[1] = LLVMBuildExtractElement(builder, tmp,
LLVMConstInt(ctx->i32, 0, 0), "");
out->stc[0] = LLVMBuildExtractElement(builder, tmp,
LLVMConstInt(ctx->i32, 1, 0), "");
out->ma = LLVMBuildExtractElement(builder, tmp,
LLVMConstInt(ctx->i32, 2, 0), "");
out->id = LLVMBuildExtractElement(builder, tmp,
LLVMConstInt(ctx->i32, 3, 0), "");
}
@@ -332,23 +332,23 @@ ac_prepare_cube_coords(struct ac_llvm_context *ctx,
LLVMValueRef *derivs_arg)
{
LLVMBuilderRef builder = ctx->builder;
struct cube_selection_coords selcoords;
LLVMValueRef coords[3];
LLVMValueRef invma;
build_cube_intrinsic(ctx, coords_arg, &selcoords);
- invma = ac_emit_llvm_intrinsic(ctx, "llvm.fabs.f32",
+ invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
- invma = ac_emit_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
+ invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
for (int i = 0; i < 2; ++i)
coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
coords[2] = selcoords.id;
if (is_deriv && derivs_arg) {
LLVMValueRef derivs[4];
int axis;
@@ -423,69 +423,69 @@ ac_build_fs_interp(struct ac_llvm_context *ctx,
if (HAVE_LLVM < 0x0400) {
LLVMValueRef ij[2];
ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
args[0] = llvm_chan;
args[1] = attr_number;
args[2] = params;
args[3] = ac_build_gather_values(ctx, ij, 2);
- return ac_emit_llvm_intrinsic(ctx, "llvm.SI.fs.interp",
- ctx->f32, args, 4,
- AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
+ ctx->f32, args, 4,
+ AC_FUNC_ATTR_READNONE);
}
args[0] = i;
args[1] = llvm_chan;
args[2] = attr_number;
args[3] = params;
- p1 = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.interp.p1",
- ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
+ p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
+ ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
args[0] = p1;
args[1] = j;
args[2] = llvm_chan;
args[3] = attr_number;
args[4] = params;
- return ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.interp.p2",
- ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
+ ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
}
LLVMValueRef
ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
LLVMValueRef parameter,
LLVMValueRef llvm_chan,
LLVMValueRef attr_number,
LLVMValueRef params)
{
LLVMValueRef args[4];
if (HAVE_LLVM < 0x0400) {
args[0] = llvm_chan;
args[1] = attr_number;
args[2] = params;
- return ac_emit_llvm_intrinsic(ctx,
- "llvm.SI.fs.constant",
- ctx->f32, args, 3,
- AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx,
+ "llvm.SI.fs.constant",
+ ctx->f32, args, 3,
+ AC_FUNC_ATTR_READNONE);
}
args[0] = parameter;
args[1] = llvm_chan;
args[2] = attr_number;
args[3] = params;
- return ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.interp.mov",
- ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
+ ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
}
LLVMValueRef
ac_build_gep0(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr,
LLVMValueRef index)
{
LLVMValueRef indices[2] = {
LLVMConstInt(ctx->i32, 0, 0),
index,
@@ -594,25 +594,25 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
LLVMConstInt(ctx->i32, 0, 0),
offset,
LLVMConstInt(ctx->i1, glc, 0),
LLVMConstInt(ctx->i1, slc, 0),
};
snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
types[func]);
- ac_emit_llvm_intrinsic(ctx, name, ctx->voidt,
- args, ARRAY_SIZE(args),
- writeonly_memory ?
- AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
- AC_FUNC_ATTR_WRITEONLY);
+ ac_build_intrinsic(ctx, name, ctx->voidt,
+ args, ARRAY_SIZE(args),
+ writeonly_memory ?
+ AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
+ AC_FUNC_ATTR_WRITEONLY);
return;
}
static unsigned dfmt[] = {
V_008F0C_BUF_DATA_FORMAT_32,
V_008F0C_BUF_DATA_FORMAT_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32_32
};
assert(num_channels >= 1 && num_channels <= 4);
@@ -635,23 +635,23 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
/* The instruction offset field has 12 bits */
assert(voffset || inst_offset < (1 << 12));
/* The intrinsic is overloaded, we need to add a type suffix for
overloading to work. */
unsigned func = CLAMP(num_channels, 1, 3) - 1;
const char *types[] = {"i32", "v2i32", "v4i32"};
char name[256];
snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
- ac_emit_llvm_intrinsic(ctx, name, ctx->voidt,
- args, ARRAY_SIZE(args),
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(ctx, name, ctx->voidt,
+ args, ARRAY_SIZE(args),
+ AC_FUNC_ATTR_LEGACY);
}
LLVMValueRef
ac_build_buffer_load(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
int num_channels,
LLVMValueRef vindex,
LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
@@ -681,28 +681,28 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
}
if (soffset) {
args[2] = LLVMBuildAdd(ctx->builder, args[2], soffset,
"");
}
snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
type_names[func]);
- return ac_emit_llvm_intrinsic(ctx, name, types[func], args,
- ARRAY_SIZE(args),
- /* READNONE means writes can't
- * affect it, while READONLY means
- * that writes can affect it. */
- readonly_memory ?
- AC_FUNC_ATTR_READNONE :
- AC_FUNC_ATTR_READONLY);
+ return ac_build_intrinsic(ctx, name, types[func], args,
+ ARRAY_SIZE(args),
+ /* READNONE means writes can't
+ * affect it, while READONLY means
+ * that writes can affect it. */
+ readonly_memory ?
+ AC_FUNC_ATTR_READNONE :
+ AC_FUNC_ATTR_READONLY);
} else {
LLVMValueRef args[] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v16i8, ""),
voffset ? voffset : vindex,
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i32, voffset ? 1 : 0, 0), // offen
LLVMConstInt(ctx->i32, vindex ? 1 : 0, 0), //idxen
LLVMConstInt(ctx->i32, glc, 0),
LLVMConstInt(ctx->i32, slc, 0),
@@ -718,60 +718,60 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
if (voffset && vindex) {
LLVMValueRef vaddr[] = {vindex, voffset};
arg_type = "v2i32";
args[1] = ac_build_gather_values(ctx, vaddr, 2);
}
snprintf(name, sizeof(name), "llvm.SI.buffer.load.dword.%s.%s",
type_names[func], arg_type);
- return ac_emit_llvm_intrinsic(ctx, name, types[func], args,
- ARRAY_SIZE(args),
AC_FUNC_ATTR_READONLY);
+ return ac_build_intrinsic(ctx, name, types[func], args,
+ ARRAY_SIZE(args),
AC_FUNC_ATTR_READONLY);
}
}
LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vindex,
LLVMValueRef voffset,
bool readonly_memory)
{
if (HAVE_LLVM >= 0x0309) {
LLVMValueRef args [] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
vindex,
voffset,
LLVMConstInt(ctx->i1, 0, 0), /* glc */
LLVMConstInt(ctx->i1, 0, 0), /* slc */
};
- return ac_emit_llvm_intrinsic(ctx,
-
"llvm.amdgcn.buffer.load.format.v4f32",
- ctx->v4f32, args,
ARRAY_SIZE(args),
- /* READNONE means writes can't
- * affect it, while READONLY means
- * that writes can affect it. */
- readonly_memory ?
- AC_FUNC_ATTR_READNONE :
- AC_FUNC_ATTR_READONLY);
+ return ac_build_intrinsic(ctx,
+
"llvm.amdgcn.buffer.load.format.v4f32",
+ ctx->v4f32, args, ARRAY_SIZE(args),
+ /* READNONE means writes can't
+ * affect it, while READONLY means
+ * that writes can affect it. */
+ readonly_memory ?
+ AC_FUNC_ATTR_READNONE :
+ AC_FUNC_ATTR_READONLY);
}
LLVMValueRef args[] = {
rsrc,
voffset,
vindex,
};
- return ac_emit_llvm_intrinsic(ctx, "llvm.SI.vs.load.input",
- ctx->v4f32, args, 3,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(ctx, "llvm.SI.vs.load.input",
+ ctx->v4f32, args, 3,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
/**
* Set range metadata on an instruction. This can only be used on load and
* call instructions. If you know an instruction can only produce the values
* 0, 1, 2, you would do set_range_metadata(value, 0, 3);
* \p lo is the minimum value inclusive.
* \p hi is the maximum value exclusive.
*/
static void set_range_metadata(struct ac_llvm_context *ctx,
@@ -786,34 +786,34 @@ static void set_range_metadata(struct ac_llvm_context
*ctx,
range_md = LLVMMDNodeInContext(context, md_args, 2);
LLVMSetMetadata(value, ctx->range_md_kind, range_md);
}
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx)
{
LLVMValueRef tid;
if (HAVE_LLVM < 0x0308) {
- tid = ac_emit_llvm_intrinsic(ctx, "llvm.SI.tid",
- ctx->i32,
- NULL, 0, AC_FUNC_ATTR_READNONE);
+ tid = ac_build_intrinsic(ctx, "llvm.SI.tid",
+ ctx->i32,
+ NULL, 0, AC_FUNC_ATTR_READNONE);
} else {
LLVMValueRef tid_args[2];
tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
- tid_args[1] = ac_emit_llvm_intrinsic(ctx,
- "llvm.amdgcn.mbcnt.lo",
ctx->i32,
- tid_args, 2,
AC_FUNC_ATTR_READNONE);
+ tid_args[1] = ac_build_intrinsic(ctx,
+ "llvm.amdgcn.mbcnt.lo",
ctx->i32,
+ tid_args, 2,
AC_FUNC_ATTR_READNONE);
- tid = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
- ctx->i32, tid_args,
- 2, AC_FUNC_ATTR_READNONE);
+ tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
+ ctx->i32, tid_args,
+ 2, AC_FUNC_ATTR_READNONE);
}
set_range_metadata(ctx, tid, 0, 64);
return tid;
}
/*
* SI implements derivatives using the local data store (LDS)
* All writes to the LDS happen in all executing threads at
* the same time. TID is the Thread ID for the current
* thread and is a value between 0 and 63, representing
@@ -830,213 +830,212 @@ ac_get_thread_id(struct ac_llvm_context *ctx)
*
* So, masking the TID with 0xfffffffc yields the TID of the top left pixel
* of the quad, masking with 0xfffffffd yields the TID of the top pixel of
* the current pixel's column, and masking with 0xfffffffe yields the TID
* of the left pixel of the current pixel's row.
*
* Adding 1 yields the TID of the pixel to the right of the left pixel, and
* adding 2 yields the TID of the pixel below the top pixel.
*/
LLVMValueRef
-ac_emit_ddxy(struct ac_llvm_context *ctx,
- bool has_ds_bpermute,
- uint32_t mask,
- int idx,
- LLVMValueRef lds,
- LLVMValueRef val)
+ac_build_ddxy(struct ac_llvm_context *ctx,
+ bool has_ds_bpermute,
+ uint32_t mask,
+ int idx,
+ LLVMValueRef lds,
+ LLVMValueRef val)
{
LLVMValueRef thread_id, tl, trbl, tl_tid, trbl_tid, args[2];
LLVMValueRef result;
thread_id = ac_get_thread_id(ctx);
tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
LLVMConstInt(ctx->i32, mask, false), "");
trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
LLVMConstInt(ctx->i32, idx, false), "");
if (has_ds_bpermute) {
args[0] = LLVMBuildMul(ctx->builder, tl_tid,
LLVMConstInt(ctx->i32, 4, false), "");
args[1] = val;
- tl = ac_emit_llvm_intrinsic(ctx,
- "llvm.amdgcn.ds.bpermute", ctx->i32,
- args, 2, AC_FUNC_ATTR_READNONE);
+ tl = ac_build_intrinsic(ctx,
+ "llvm.amdgcn.ds.bpermute", ctx->i32,
+ args, 2, AC_FUNC_ATTR_READNONE);
args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
LLVMConstInt(ctx->i32, 4, false), "");
- trbl = ac_emit_llvm_intrinsic(ctx,
- "llvm.amdgcn.ds.bpermute",
ctx->i32,
- args, 2, AC_FUNC_ATTR_READNONE);
+ trbl = ac_build_intrinsic(ctx,
+ "llvm.amdgcn.ds.bpermute", ctx->i32,
+ args, 2, AC_FUNC_ATTR_READNONE);
} else {
LLVMValueRef store_ptr, load_ptr0, load_ptr1;
store_ptr = ac_build_gep0(ctx, lds, thread_id);
load_ptr0 = ac_build_gep0(ctx, lds, tl_tid);
load_ptr1 = ac_build_gep0(ctx, lds, trbl_tid);
LLVMBuildStore(ctx->builder, val, store_ptr);
tl = LLVMBuildLoad(ctx->builder, load_ptr0, "");
trbl = LLVMBuildLoad(ctx->builder, load_ptr1, "");
}
tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
return result;
}
void
-ac_emit_sendmsg(struct ac_llvm_context *ctx,
- uint32_t msg,
- LLVMValueRef wave_id)
+ac_build_sendmsg(struct ac_llvm_context *ctx,
+ uint32_t msg,
+ LLVMValueRef wave_id)
{
LLVMValueRef args[2];
const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" :
"llvm.amdgcn.s.sendmsg";
args[0] = LLVMConstInt(ctx->i32, msg, false);
args[1] = wave_id;
- ac_emit_llvm_intrinsic(ctx, intr_name, ctx->voidt,
- args, 2, 0);
+ ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
}
LLVMValueRef
-ac_emit_imsb(struct ac_llvm_context *ctx,
- LLVMValueRef arg,
- LLVMTypeRef dst_type)
+ac_build_imsb(struct ac_llvm_context *ctx,
+ LLVMValueRef arg,
+ LLVMTypeRef dst_type)
{
const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
"llvm.amdgcn.sffbh.i32";
- LLVMValueRef msb = ac_emit_llvm_intrinsic(ctx, intr_name,
- dst_type, &arg, 1,
- AC_FUNC_ATTR_READNONE);
+ LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
+ dst_type, &arg, 1,
+ AC_FUNC_ATTR_READNONE);
/* The HW returns the last bit index from MSB, but NIR/TGSI wants
* the index from LSB. Invert it by doing "31 - msb". */
msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
msb, "");
LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
LLVMValueRef cond = LLVMBuildOr(ctx->builder,
LLVMBuildICmp(ctx->builder, LLVMIntEQ,
arg,
LLVMConstInt(ctx->i32, 0, 0), ""),
LLVMBuildICmp(ctx->builder, LLVMIntEQ,
arg, all_ones, ""), "");
return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
}
LLVMValueRef
-ac_emit_umsb(struct ac_llvm_context *ctx,
- LLVMValueRef arg,
- LLVMTypeRef dst_type)
+ac_build_umsb(struct ac_llvm_context *ctx,
+ LLVMValueRef arg,
+ LLVMTypeRef dst_type)
{
LLVMValueRef args[2] = {
arg,
LLVMConstInt(ctx->i1, 1, 0),
};
- LLVMValueRef msb = ac_emit_llvm_intrinsic(ctx, "llvm.ctlz.i32",
- dst_type, args,
ARRAY_SIZE(args),
- AC_FUNC_ATTR_READNONE);
+ LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
+ dst_type, args, ARRAY_SIZE(args),
+ AC_FUNC_ATTR_READNONE);
/* The HW returns the last bit index from MSB, but TGSI/NIR wants
* the index from LSB. Invert it by doing "31 - msb". */
msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
msb, "");
/* check for zero */
return LLVMBuildSelect(ctx->builder,
LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
LLVMConstInt(ctx->i32, 0, 0), ""),
LLVMConstInt(ctx->i32, -1, true), msb, "");
}
-LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
+LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
{
if (HAVE_LLVM >= 0x0500) {
LLVMValueRef max[2] = {
value,
LLVMConstReal(ctx->f32, 0),
};
LLVMValueRef min[2] = {
LLVMConstReal(ctx->f32, 1),
};
- min[1] = ac_emit_llvm_intrinsic(ctx, "llvm.maxnum.f32",
- ctx->f32, max, 2,
- AC_FUNC_ATTR_READNONE);
- return ac_emit_llvm_intrinsic(ctx, "llvm.minnum.f32",
- ctx->f32, min, 2,
- AC_FUNC_ATTR_READNONE);
+ min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
+ ctx->f32, max, 2,
+ AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx, "llvm.minnum.f32",
+ ctx->f32, min, 2,
+ AC_FUNC_ATTR_READNONE);
}
const char *intr = HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." :
"llvm.AMDIL.clamp.";
LLVMValueRef args[3] = {
value,
LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, 1),
};
- return ac_emit_llvm_intrinsic(ctx, intr, ctx->f32, args, 3,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(ctx, intr, ctx->f32, args, 3,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
-void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
+void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
{
LLVMValueRef args[9];
if (HAVE_LLVM >= 0x0500) {
args[0] = LLVMConstInt(ctx->i32, a->target, 0);
args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
if (a->compr) {
LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
v2i16, "");
args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
v2i16, "");
args[4] = LLVMConstInt(ctx->i1, a->done, 0);
args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
- ac_emit_llvm_intrinsic(ctx,
"llvm.amdgcn.exp.compr.v2i16",
- ctx->voidt, args, 6, 0);
+ ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
+ ctx->voidt, args, 6, 0);
} else {
args[2] = a->out[0];
args[3] = a->out[1];
args[4] = a->out[2];
args[5] = a->out[3];
args[6] = LLVMConstInt(ctx->i1, a->done, 0);
args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
- ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.exp.f32",
- ctx->voidt, args, 8, 0);
+ ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
+ ctx->voidt, args, 8, 0);
}
return;
}
args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
args[2] = LLVMConstInt(ctx->i32, a->done, 0);
args[3] = LLVMConstInt(ctx->i32, a->target, 0);
args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
- ac_emit_llvm_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
+ AC_FUNC_ATTR_LEGACY);
}
-LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
- struct ac_image_args *a)
+LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
+ struct ac_image_args *a)
{
LLVMTypeRef dst_type;
LLVMValueRef args[11];
unsigned num_args = 0;
const char *name;
char intr_name[128], type[64];
if (HAVE_LLVM >= 0x0400) {
bool sample = a->opcode == ac_image_sample ||
a->opcode == ac_image_gather4 ||
@@ -1086,23 +1085,23 @@ LLVMValueRef ac_emit_image_opcode(struct
ac_llvm_context *ctx,
name,
a->compare ? ".c" : "",
a->bias ? ".b" :
a->lod ? ".l" :
a->deriv ? ".d" :
a->level_zero ? ".lz" : "",
a->offset ? ".o" : "",
type);
LLVMValueRef result =
- ac_emit_llvm_intrinsic(ctx, intr_name,
- ctx->v4f32, args, num_args,
- AC_FUNC_ATTR_READNONE);
+ ac_build_intrinsic(ctx, intr_name,
+ ctx->v4f32, args, num_args,
+ AC_FUNC_ATTR_READNONE);
if (!sample) {
result = LLVMBuildBitCast(ctx->builder, result,
ctx->v4i32, "");
}
return result;
}
args[num_args++] = a->addr;
args[num_args++] = a->resource;
@@ -1149,75 +1148,75 @@ LLVMValueRef ac_emit_image_opcode(struct
ac_llvm_context *ctx,
snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
name,
a->compare ? ".c" : "",
a->bias ? ".b" :
a->lod ? ".l" :
a->deriv ? ".d" :
a->level_zero ? ".lz" : "",
a->offset ? ".o" : "",
type);
- return ac_emit_llvm_intrinsic(ctx, intr_name,
- dst_type, args, num_args,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(ctx, intr_name,
+ dst_type, args, num_args,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
-LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
- LLVMValueRef args[2])
+LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
+ LLVMValueRef args[2])
{
if (HAVE_LLVM >= 0x0500) {
LLVMTypeRef v2f16 =
LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
LLVMValueRef res =
- ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
- v2f16, args, 2,
- AC_FUNC_ATTR_READNONE);
+ ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
+ v2f16, args, 2,
+ AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
- return ac_emit_llvm_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
/**
* KILL, AKA discard in GLSL.
*
* \param value kill if value < 0.0 or value == NULL.
*/
-void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
+void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
{
if (value) {
- ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
- &value, 1, AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
+ &value, 1, AC_FUNC_ATTR_LEGACY);
} else {
- ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
- NULL, 0, AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
+ NULL, 0, AC_FUNC_ATTR_LEGACY);
}
}
-LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
- LLVMValueRef offset, LLVMValueRef width,
- bool is_signed)
+LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+ LLVMValueRef offset, LLVMValueRef width,
+ bool is_signed)
{
LLVMValueRef args[] = {
input,
offset,
width,
};
if (HAVE_LLVM >= 0x0500) {
- return ac_emit_llvm_intrinsic(ctx,
- is_signed ?
"llvm.amdgcn.sbfe.i32" :
-
"llvm.amdgcn.ubfe.i32",
- ctx->i32, args, 3,
- AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(ctx,
+ is_signed ? "llvm.amdgcn.sbfe.i32" :
+ "llvm.amdgcn.ubfe.i32",
+ ctx->i32, args, 3,
+ AC_FUNC_ATTR_READNONE);
}
- return ac_emit_llvm_intrinsic(ctx,
- is_signed ? "llvm.AMDGPU.bfe.i32" :
- "llvm.AMDGPU.bfe.u32",
- ctx->i32, args, 3,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(ctx,
+ is_signed ? "llvm.AMDGPU.bfe.i32" :
+ "llvm.AMDGPU.bfe.u32",
+ ctx->i32, args, 3,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index ae96d56..d3c537b 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -51,41 +51,41 @@ struct ac_llvm_context {
unsigned uniform_md_kind;
unsigned fpmath_md_kind;
LLVMValueRef fpmath_md_2p5_ulp;
LLVMValueRef empty_md;
};
void
ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context);
LLVMValueRef
-ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name,
- LLVMTypeRef return_type, LLVMValueRef *params,
- unsigned param_count, unsigned attrib_mask);
+ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
+ LLVMTypeRef return_type, LLVMValueRef *params,
+ unsigned param_count, unsigned attrib_mask);
void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned
bufsize);
LLVMValueRef
ac_build_gather_values_extended(struct ac_llvm_context *ctx,
LLVMValueRef *values,
unsigned value_count,
unsigned value_stride,
bool load);
LLVMValueRef
ac_build_gather_values(struct ac_llvm_context *ctx,
LLVMValueRef *values,
unsigned value_count);
LLVMValueRef
-ac_emit_fdiv(struct ac_llvm_context *ctx,
- LLVMValueRef num,
- LLVMValueRef den);
+ac_build_fdiv(struct ac_llvm_context *ctx,
+ LLVMValueRef num,
+ LLVMValueRef den);
void
ac_prepare_cube_coords(struct ac_llvm_context *ctx,
bool is_deriv, bool is_array,
LLVMValueRef *coords_arg,
LLVMValueRef *derivs_arg);
LLVMValueRef
ac_build_fs_interp(struct ac_llvm_context *ctx,
@@ -152,59 +152,59 @@ LLVMValueRef ac_build_buffer_load_format(struct
ac_llvm_context *ctx,
bool readonly_memory);
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx);
#define AC_TID_MASK_TOP_LEFT 0xfffffffc
#define AC_TID_MASK_TOP 0xfffffffd
#define AC_TID_MASK_LEFT 0xfffffffe
LLVMValueRef
-ac_emit_ddxy(struct ac_llvm_context *ctx,
- bool has_ds_bpermute,
- uint32_t mask,
- int idx,
- LLVMValueRef lds,
- LLVMValueRef val);
+ac_build_ddxy(struct ac_llvm_context *ctx,
+ bool has_ds_bpermute,
+ uint32_t mask,
+ int idx,
+ LLVMValueRef lds,
+ LLVMValueRef val);
#define AC_SENDMSG_GS 2
#define AC_SENDMSG_GS_DONE 3
#define AC_SENDMSG_GS_OP_NOP (0 << 4)
#define AC_SENDMSG_GS_OP_CUT (1 << 4)
#define AC_SENDMSG_GS_OP_EMIT (2 << 4)
#define AC_SENDMSG_GS_OP_EMIT_CUT (3 << 4)
-void ac_emit_sendmsg(struct ac_llvm_context *ctx,
- uint32_t msg,
- LLVMValueRef wave_id);
+void ac_build_sendmsg(struct ac_llvm_context *ctx,
+ uint32_t msg,
+ LLVMValueRef wave_id);
-LLVMValueRef ac_emit_imsb(struct ac_llvm_context *ctx,
- LLVMValueRef arg,
- LLVMTypeRef dst_type);
+LLVMValueRef ac_build_imsb(struct ac_llvm_context *ctx,
+ LLVMValueRef arg,
+ LLVMTypeRef dst_type);
-LLVMValueRef ac_emit_umsb(struct ac_llvm_context *ctx,
+LLVMValueRef ac_build_umsb(struct ac_llvm_context *ctx,
LLVMValueRef arg,
LLVMTypeRef dst_type);
-LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, LLVMValueRef value);
+LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value);
struct ac_export_args {
LLVMValueRef out[4];
unsigned target;
unsigned enabled_channels;
bool compr;
bool done;
bool valid_mask;
};
-void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
+void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
enum ac_image_opcode {
ac_image_sample,
ac_image_gather4,
ac_image_load,
ac_image_load_mip,
ac_image_get_lod,
ac_image_get_resinfo,
};
@@ -218,24 +218,24 @@ struct ac_image_args {
bool offset;
LLVMValueRef resource;
LLVMValueRef sampler;
LLVMValueRef addr;
unsigned dmask;
bool unorm;
bool da;
};
-LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
- struct ac_image_args *a);
-LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
- LLVMValueRef args[2]);
-void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
-LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
- LLVMValueRef offset, LLVMValueRef width,
- bool is_signed);
+LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
+ struct ac_image_args *a);
+LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
+ LLVMValueRef args[2]);
+void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
+LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+ LLVMValueRef offset, LLVMValueRef width,
+ bool is_signed);
#ifdef __cplusplus
}
#endif
#endif
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bf330c2..af0ee39 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -560,23 +560,23 @@ static void create_function(struct nir_to_llvm_context
*ctx)
for (; i < arg_idx; ++i)
ctx->shader_info->num_input_vgprs +=
llvm_get_type_size(arg_types[i]) / 4;
arg_idx = 0;
user_sgpr_idx = 0;
if (ctx->options->supports_spill || need_ring_offsets) {
set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS,
user_sgpr_idx, 2);
user_sgpr_idx += 2;
if (ctx->options->supports_spill) {
- ctx->ring_offsets = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.amdgcn.implicit.buffer.ptr",
-
LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
- NULL, 0,
AC_FUNC_ATTR_READNONE);
+ ctx->ring_offsets = ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.implicit.buffer.ptr",
+
LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
+ NULL, 0,
AC_FUNC_ATTR_READNONE);
ctx->ring_offsets = LLVMBuildBitCast(ctx->builder,
ctx->ring_offsets,
const_array(ctx->v16i8, 8), "");
} else
ctx->ring_offsets = LLVMGetParam(ctx->main_function,
arg_idx++);
}
for (unsigned i = 0; i < num_sets; ++i) {
if (ctx->options->layout->set[i].layout->shader_stages & (1 <<
ctx->stage)) {
set_userdata_location(&ctx->shader_info->user_sgprs_locs.descriptor_sets[i],
user_sgpr_idx, 2);
user_sgpr_idx += 2;
@@ -866,52 +866,52 @@ static LLVMValueRef emit_intrin_1f_param(struct
nir_to_llvm_context *ctx,
const char *intrin,
LLVMTypeRef result_type,
LLVMValueRef src0)
{
char name[64];
LLVMValueRef params[] = {
to_float(ctx, src0),
};
sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
- return ac_emit_llvm_intrinsic(&ctx->ac, name, result_type, params, 1,
AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(&ctx->ac, name, result_type, params, 1,
AC_FUNC_ATTR_READNONE);
}
static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx,
const char *intrin,
LLVMTypeRef result_type,
LLVMValueRef src0, LLVMValueRef src1)
{
char name[64];
LLVMValueRef params[] = {
to_float(ctx, src0),
to_float(ctx, src1),
};
sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
- return ac_emit_llvm_intrinsic(&ctx->ac, name, result_type, params, 2,
AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(&ctx->ac, name, result_type, params, 2,
AC_FUNC_ATTR_READNONE);
}
static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx,
const char *intrin,
LLVMTypeRef result_type,
LLVMValueRef src0, LLVMValueRef src1,
LLVMValueRef src2)
{
char name[64];
LLVMValueRef params[] = {
to_float(ctx, src0),
to_float(ctx, src1),
to_float(ctx, src2),
};
sprintf(name, "%s.f%d", intrin, get_elem_bits(ctx, result_type));
- return ac_emit_llvm_intrinsic(&ctx->ac, name, result_type, params, 3,
AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(&ctx->ac, name, result_type, params, 3,
AC_FUNC_ATTR_READNONE);
}
static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx,
LLVMValueRef src0, LLVMValueRef src1,
LLVMValueRef src2)
{
LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
ctx->i32zero, "");
return LLVMBuildSelect(ctx->builder, v, src1, src2, "");
}
@@ -923,33 +923,33 @@ static LLVMValueRef emit_find_lsb(struct
nir_to_llvm_context *ctx,
/* The value of 1 means that ffs(x=0) = undef, so LLVM won't
* add special code to check for x=0. The reason is that
* the LLVM behavior for x=0 is different from what we
* need here.
*
* The hardware already implements the correct behavior.
*/
LLVMConstInt(ctx->i32, 1, false),
};
- return ac_emit_llvm_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32,
params, 2, AC_FUNC_ATTR_READNONE);
+ return ac_build_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params,
2, AC_FUNC_ATTR_READNONE);
}
static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx,
LLVMValueRef src0)
{
- return ac_emit_imsb(&ctx->ac, src0, ctx->i32);
+ return ac_build_imsb(&ctx->ac, src0, ctx->i32);
}
static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx,
LLVMValueRef src0)
{
- return ac_emit_umsb(&ctx->ac, src0, ctx->i32);
+ return ac_build_umsb(&ctx->ac, src0, ctx->i32);
}
static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx,
LLVMIntPredicate pred,
LLVMValueRef src0, LLVMValueRef src1)
{
return LLVMBuildSelect(ctx->builder,
LLVMBuildICmp(ctx->builder, pred, src0, src1,
""),
src0,
src1, "");
@@ -987,39 +987,39 @@ static LLVMValueRef emit_isign(struct nir_to_llvm_context
*ctx,
}
static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx,
LLVMValueRef src0)
{
const char *intr = "llvm.floor.f32";
LLVMValueRef fsrc0 = to_float(ctx, src0);
LLVMValueRef params[] = {
fsrc0,
};
- LLVMValueRef floor = ac_emit_llvm_intrinsic(&ctx->ac, intr,
- ctx->f32, params, 1,
- AC_FUNC_ATTR_READNONE);
+ LLVMValueRef floor = ac_build_intrinsic(&ctx->ac, intr,
+ ctx->f32, params, 1,
+ AC_FUNC_ATTR_READNONE);
return LLVMBuildFSub(ctx->builder, fsrc0, floor, "");
}
static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx,
const char *intrin,
LLVMValueRef src0, LLVMValueRef src1)
{
LLVMTypeRef ret_type;
LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
LLVMValueRef res;
LLVMValueRef params[] = { src0, src1 };
ret_type = LLVMStructTypeInContext(ctx->context, types,
2, true);
- res = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ret_type,
- params, 2, AC_FUNC_ATTR_READNONE);
+ res = ac_build_intrinsic(&ctx->ac, intrin, ret_type,
+ params, 2, AC_FUNC_ATTR_READNONE);
res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
return res;
}
static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx,
LLVMValueRef src0)
{
return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder,
LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), "");
@@ -1050,22 +1050,22 @@ static LLVMValueRef emit_imul_high(struct
nir_to_llvm_context *ctx,
result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
return result;
}
static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
const char *intrin, unsigned
attr_mask,
LLVMValueRef srcs[3])
{
LLVMValueRef result;
LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2],
LLVMConstInt(ctx->i32, 32, false), "");
- result = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->i32, srcs, 3,
- AC_FUNC_ATTR_READNONE | attr_mask);
+ result = ac_build_intrinsic(&ctx->ac, intrin, ctx->i32, srcs, 3,
+ AC_FUNC_ATTR_READNONE | attr_mask);
result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
return result;
}
static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx,
LLVMValueRef src0, LLVMValueRef src1,
LLVMValueRef src2, LLVMValueRef src3)
{
LLVMValueRef bfi_args[3], result;
@@ -1159,21 +1159,21 @@ static LLVMValueRef emit_ddxy(struct
nir_to_llvm_context *ctx,
mask = AC_TID_MASK_TOP_LEFT;
/* for DDX we want to next X pixel, DDY next Y pixel. */
if (op == nir_op_fddx_fine ||
op == nir_op_fddx_coarse ||
op == nir_op_fddx)
idx = 1;
else
idx = 2;
- result = ac_emit_ddxy(&ctx->ac, ctx->has_ds_bpermute,
+ result = ac_build_ddxy(&ctx->ac, ctx->has_ds_bpermute,
mask, idx, ctx->lds,
src0);
return result;
}
/*
* this takes an I,J coordinate pair,
* and works out the X and Y derivatives.
* it returns DDX(I), DDX(J), DDY(I), DDY(J).
*/
@@ -1256,21 +1256,21 @@ static void visit_alu(struct nir_to_llvm_context *ctx,
nir_alu_instr *instr)
break;
case nir_op_imod:
result = LLVMBuildSRem(ctx->builder, src[0], src[1], "");
break;
case nir_op_umod:
result = LLVMBuildURem(ctx->builder, src[0], src[1], "");
break;
case nir_op_fmod:
src[0] = to_float(ctx, src[0]);
src[1] = to_float(ctx, src[1]);
- result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
+ result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
result = emit_intrin_1f_param(ctx, "llvm.floor",
to_float_type(ctx, def_type),
result);
result = LLVMBuildFMul(ctx->builder, src[1] , result, "");
result = LLVMBuildFSub(ctx->builder, src[0], result, "");
break;
case nir_op_frem:
src[0] = to_float(ctx, src[0]);
src[1] = to_float(ctx, src[1]);
result = LLVMBuildFRem(ctx->builder, src[0], src[1], "");
break;
@@ -1284,25 +1284,25 @@ static void visit_alu(struct nir_to_llvm_context *ctx,
nir_alu_instr *instr)
result = LLVMBuildUDiv(ctx->builder, src[0], src[1], "");
break;
case nir_op_fmul:
src[0] = to_float(ctx, src[0]);
src[1] = to_float(ctx, src[1]);
result = LLVMBuildFMul(ctx->builder, src[0], src[1], "");
break;
case nir_op_fdiv:
src[0] = to_float(ctx, src[0]);
src[1] = to_float(ctx, src[1]);
- result = ac_emit_fdiv(&ctx->ac, src[0], src[1]);
+ result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
break;
case nir_op_frcp:
src[0] = to_float(ctx, src[0]);
- result = ac_emit_fdiv(&ctx->ac, ctx->f32one, src[0]);
+ result = ac_build_fdiv(&ctx->ac, ctx->f32one, src[0]);
break;
case nir_op_iand:
result = LLVMBuildAnd(ctx->builder, src[0], src[1], "");
break;
case nir_op_ior:
result = LLVMBuildOr(ctx->builder, src[0], src[1], "");
break;
case nir_op_ixor:
result = LLVMBuildXor(ctx->builder, src[0], src[1], "");
break;
@@ -1406,21 +1406,21 @@ static void visit_alu(struct nir_to_llvm_context *ctx,
nir_alu_instr *instr)
result = emit_intrin_1f_param(ctx, "llvm.exp2",
to_float_type(ctx, def_type),
src[0]);
break;
case nir_op_flog2:
result = emit_intrin_1f_param(ctx, "llvm.log2",
to_float_type(ctx, def_type),
src[0]);
break;
case nir_op_frsq:
result = emit_intrin_1f_param(ctx, "llvm.sqrt",
to_float_type(ctx, def_type),
src[0]);
- result = ac_emit_fdiv(&ctx->ac, ctx->f32one, result);
+ result = ac_build_fdiv(&ctx->ac, ctx->f32one, result);
break;
case nir_op_fpow:
result = emit_intrin_2f_param(ctx, "llvm.pow",
to_float_type(ctx, def_type),
src[0], src[1]);
break;
case nir_op_fmax:
result = emit_intrin_2f_param(ctx, "llvm.maxnum",
to_float_type(ctx, def_type),
src[0], src[1]);
break;
case nir_op_fmin:
@@ -1436,24 +1436,24 @@ static void visit_alu(struct nir_to_llvm_context *ctx,
nir_alu_instr *instr)
AC_FUNC_ATTR_LEGACY, src);
break;
case nir_op_ubitfield_extract:
result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32",
AC_FUNC_ATTR_LEGACY, src);
break;
case nir_op_bitfield_insert:
result = emit_bitfield_insert(ctx, src[0], src[1], src[2],
src[3]);
break;
case nir_op_bitfield_reverse:
- result = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
+ result = ac_build_intrinsic(&ctx->ac, "llvm.bitreverse.i32",
ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
break;
case nir_op_bit_count:
- result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctpop.i32",
ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
+ result = ac_build_intrinsic(&ctx->ac, "llvm.ctpop.i32",
ctx->i32, src, 1, AC_FUNC_ATTR_READNONE);
break;
case nir_op_vec2:
case nir_op_vec3:
case nir_op_vec4:
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs;
i++)
src[i] = to_integer(ctx, src[i]);
result = ac_build_gather_values(&ctx->ac, src, num_components);
break;
case nir_op_d2i:
case nir_op_f2i:
@@ -1643,49 +1643,49 @@ static LLVMValueRef radv_lower_gather4_integer(struct
nir_to_llvm_context *ctx,
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false);
txq_args[txq_arg_count++] = tinfo->args[1];
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /*
dmask */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
unorm */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
r128 */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0,
0);
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
glc */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
slc */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
tfe */
txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /*
lwe */
- size = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.SI.getresinfo.i32", ctx->v4i32,
- txq_args, txq_arg_count,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ size = ac_build_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32",
ctx->v4i32,
+ txq_args, txq_arg_count,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
for (c = 0; c < 2; c++) {
half_texel[c] = LLVMBuildExtractElement(ctx->builder,
size,
LLVMConstInt(ctx->i32, c, false), "");
half_texel[c] = LLVMBuildUIToFP(ctx->builder,
half_texel[c], ctx->f32, "");
- half_texel[c] = ac_emit_fdiv(&ctx->ac, ctx->f32one,
half_texel[c]);
+ half_texel[c] = ac_build_fdiv(&ctx->ac, ctx->f32one,
half_texel[c]);
half_texel[c] = LLVMBuildFMul(ctx->builder,
half_texel[c],
LLVMConstReal(ctx->f32,
-0.5), "");
}
}
for (c = 0; c < 2; c++) {
LLVMValueRef tmp;
LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index +
c, 0);
tmp = LLVMBuildExtractElement(ctx->builder, coord, index, "");
tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index,
"");
}
tinfo->args[0] = coord;
- return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type,
tinfo->args, tinfo->arg_count,
- AC_FUNC_ATTR_READNONE |
AC_FUNC_ATTR_NOUNWIND |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(&ctx->ac, intr_name, tinfo->dst_type,
tinfo->args, tinfo->arg_count,
+ AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND
|
+ AC_FUNC_ATTR_LEGACY);
}
static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
nir_tex_instr *instr,
struct ac_tex_info *tinfo)
{
const char *name = "llvm.SI.image.sample";
const char *infix = "";
char intr_name[127];
@@ -1738,23 +1738,23 @@ static LLVMValueRef build_tex_intrinsic(struct
nir_to_llvm_context *ctx,
sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix,
has_offset ? ".o" : "", type);
if (instr->op == nir_texop_tg4) {
enum glsl_base_type stype =
glsl_get_sampler_result_type(instr->texture->var->type);
if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
return radv_lower_gather4_integer(ctx, tinfo, instr,
intr_name,
(int)has_offset +
(int)is_shadow);
}
}
- return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type,
tinfo->args, tinfo->arg_count,
- AC_FUNC_ATTR_READNONE |
AC_FUNC_ATTR_NOUNWIND |
- AC_FUNC_ATTR_LEGACY);
+ return ac_build_intrinsic(&ctx->ac, intr_name, tinfo->dst_type,
tinfo->args, tinfo->arg_count,
+ AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND
|
+ AC_FUNC_ATTR_LEGACY);
}
static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef index = get_src(ctx, instr->src[0]);
unsigned desc_set = nir_intrinsic_desc_set(instr);
unsigned binding = nir_intrinsic_binding(instr);
LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set];
@@ -1877,22 +1877,22 @@ static void visit_store_ssbo(struct nir_to_llvm_context
*ctx,
data = base_data;
store_name = "llvm.amdgcn.buffer.store.f32";
}
offset = base_offset;
if (start != 0) {
offset = LLVMBuildAdd(ctx->builder, offset,
LLVMConstInt(ctx->i32, start * 4, false), "");
}
params[0] = data;
params[3] = offset;
- ac_emit_llvm_intrinsic(&ctx->ac, store_name,
- ctx->voidt, params, 6, 0);
+ ac_build_intrinsic(&ctx->ac, store_name,
+ ctx->voidt, params, 6, 0);
}
}
static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
const char *name;
LLVMValueRef params[6];
int arg_count = 0;
if (ctx->stage == MESA_SHADER_FRAGMENT)
@@ -1935,21 +1935,21 @@ static LLVMValueRef visit_atomic_ssbo(struct
nir_to_llvm_context *ctx,
case nir_intrinsic_ssbo_atomic_exchange:
name = "llvm.amdgcn.buffer.atomic.swap";
break;
case nir_intrinsic_ssbo_atomic_comp_swap:
name = "llvm.amdgcn.buffer.atomic.cmpswap";
break;
default:
abort();
}
- return ac_emit_llvm_intrinsic(&ctx->ac, name, ctx->i32, params,
arg_count, 0);
+ return ac_build_intrinsic(&ctx->ac, name, ctx->i32, params, arg_count,
0);
}
static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef results[2];
int load_components;
int num_components = instr->num_components;
if (instr->dest.ssa.bit_size == 64)
num_components *= 2;
@@ -1976,21 +1976,21 @@ static LLVMValueRef visit_load_buffer(struct
nir_to_llvm_context *ctx,
unreachable("unhandled number of components");
LLVMValueRef params[] = {
get_src(ctx, instr->src[0]),
LLVMConstInt(ctx->i32, 0, false),
offset,
LLVMConstInt(ctx->i1, 0, false),
LLVMConstInt(ctx->i1, 0, false),
};
- results[i] = ac_emit_llvm_intrinsic(&ctx->ac, load_name,
data_type, params, 5, 0);
+ results[i] = ac_build_intrinsic(&ctx->ac, load_name, data_type,
params, 5, 0);
}
LLVMValueRef ret = results[0];
if (num_components > 4 || num_components == 3) {
LLVMValueRef masks[] = {
LLVMConstInt(ctx->i32, 0, false),
LLVMConstInt(ctx->i32, 1, false),
LLVMConstInt(ctx->i32, 2, false),
LLVMConstInt(ctx->i32, 3, false),
LLVMConstInt(ctx->i32, 4, false),
LLVMConstInt(ctx->i32, 5, false),
LLVMConstInt(ctx->i32, 6, false),
LLVMConstInt(ctx->i32, 7, false)
@@ -2017,24 +2017,24 @@ static LLVMValueRef visit_load_ubo_buffer(struct
nir_to_llvm_context *ctx,
if (instr->dest.ssa.bit_size == 64)
num_components *= 2;
for (unsigned i = 0; i < num_components; ++i) {
LLVMValueRef params[] = {
rsrc,
LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 *
i, 0),
offset, "")
};
- results[i] = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.SI.load.const", ctx->f32,
- params, 2,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ results[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.load.const",
ctx->f32,
+ params, 2,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
}
ret = ac_build_gather_values(&ctx->ac, results, instr->num_components);
return LLVMBuildBitCast(ctx->builder, ret,
get_def_type(ctx, &instr->dest.ssa), "");
}
static void
radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail,
@@ -2120,24 +2120,24 @@ load_gs_input(struct nir_to_llvm_context *ctx,
args[0] = ctx->esgs_ring;
args[1] = vtx_offset;
args[2] = LLVMConstInt(ctx->i32, (param * 4 + i + const_index +
cull_offset) * 256, false);
args[3] = ctx->i32zero;
args[4] = ctx->i32one; /* OFFEN */
args[5] = ctx->i32zero; /* IDXEN */
args[6] = ctx->i32one; /* GLC */
args[7] = ctx->i32zero; /* SLC */
args[8] = ctx->i32zero; /* TFE */
- value[i] = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.SI.buffer.load.dword.i32.i32",
- ctx->i32, args, 9,
- AC_FUNC_ATTR_READONLY |
- AC_FUNC_ATTR_LEGACY);
+ value[i] = ac_build_intrinsic(&ctx->ac,
"llvm.SI.buffer.load.dword.i32.i32",
+ ctx->i32, args, 9,
+ AC_FUNC_ATTR_READONLY |
+ AC_FUNC_ATTR_LEGACY);
}
result = ac_build_gather_values(&ctx->ac, value, instr->num_components);
return result;
}
static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef values[8];
@@ -2446,22 +2446,22 @@ static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context *
params[4] = slc;
params[5] = lwe;
params[6] = da;
get_image_intr_name("llvm.amdgcn.image.load",
ctx->v4f32, /* vdata */
LLVMTypeOf(params[0]), /* coords */
LLVMTypeOf(params[1]), /* rsrc */
intrinsic_name, sizeof(intrinsic_name));
- res = ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
- params, 7, AC_FUNC_ATTR_READONLY);
+ res = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
+ params, 7, AC_FUNC_ATTR_READONLY);
res = to_integer(ctx, res);
LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
res,
ctx->i32zero, "");
LLVMValueRef sample_index4 =
@@ -2583,22 +2583,22 @@ static LLVMValueRef visit_image_load(struct
nir_to_llvm_context *ctx,
type = instr->variables[0]->deref.child->type;
type = glsl_without_array(type);
if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
params[0] = get_sampler_desc(ctx, instr->variables[0],
DESC_BUFFER);
params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx,
instr->src[0]),
LLVMConstInt(ctx->i32, 0,
false), ""); /* vindex */
params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */
params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */
- res = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
- params, 5, 0);
+ res = ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32,
+ params, 5, 0);
res = trim_vector(ctx, res, instr->dest.ssa.num_components);
res = to_integer(ctx, res);
} else {
bool is_da = glsl_sampler_type_is_array(type) ||
glsl_get_sampler_dim(type) ==
GLSL_SAMPLER_DIM_CUBE;
LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero;
LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false);
LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false);
@@ -2617,22 +2617,22 @@ static LLVMValueRef visit_image_load(struct
nir_to_llvm_context *ctx,
params[5] = lwe;
params[6] = da;
}
get_image_intr_name("llvm.amdgcn.image.load",
ctx->v4f32, /* vdata */
LLVMTypeOf(params[0]), /* coords */
LLVMTypeOf(params[1]), /* rsrc */
intrinsic_name, sizeof(intrinsic_name));
- res = ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name,
ctx->v4f32,
- params, 7, AC_FUNC_ATTR_READONLY);
+ res = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32,
+ params, 7, AC_FUNC_ATTR_READONLY);
}
return to_integer(ctx, res);
}
static void visit_image_store(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef params[8];
char intrinsic_name[64];
const nir_variable *var = instr->variables[0]->var;
@@ -2644,22 +2644,22 @@ static void visit_image_store(struct
nir_to_llvm_context *ctx,
ctx->shader_info->fs.writes_memory = true;
if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data
*/
params[1] = get_sampler_desc(ctx, instr->variables[0],
DESC_BUFFER);
params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx,
instr->src[0]),
LLVMConstInt(ctx->i32, 0,
false), ""); /* vindex */
params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */
params[4] = i1false; /* glc */
params[5] = i1false; /* slc */
- ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
- params, 6, 0);
+ ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt,
+ params, 6, 0);
} else {
bool is_da = glsl_sampler_type_is_array(type) ||
glsl_get_sampler_dim(type) ==
GLSL_SAMPLER_DIM_CUBE;
LLVMValueRef da = is_da ? i1true : i1false;
LLVMValueRef glc = i1false;
LLVMValueRef slc = i1false;
params[0] = to_float(ctx, get_src(ctx, instr->src[2]));
params[1] = get_image_coords(ctx, instr); /* coords */
params[2] = get_sampler_desc(ctx, instr->variables[0],
DESC_IMAGE);
@@ -2676,22 +2676,22 @@ static void visit_image_store(struct
nir_to_llvm_context *ctx,
params[6] = lwe;
params[7] = da;
}
get_image_intr_name("llvm.amdgcn.image.store",
LLVMTypeOf(params[0]), /* vdata */
LLVMTypeOf(params[1]), /* coords */
LLVMTypeOf(params[2]), /* rsrc */
intrinsic_name, sizeof(intrinsic_name));
- ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt,
- params, 8, 0);
+ ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt,
+ params, 8, 0);
}
}
static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef params[6];
int param_count = 0;
const nir_variable *var = instr->variables[0]->var;
@@ -2754,21 +2754,21 @@ static LLVMValueRef visit_image_atomic(struct
nir_to_llvm_context *ctx,
atomic_name = "cmpswap";
break;
default:
abort();
}
build_int_type_name(LLVMTypeOf(coords),
coords_type, sizeof(coords_type));
snprintf(intrinsic_name, sizeof(intrinsic_name),
"%s.%s.%s", base_name, atomic_name, coords_type);
- return ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->i32,
params, param_count, 0);
+ return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params,
param_count, 0);
}
static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef res;
LLVMValueRef params[10];
const nir_variable *var = instr->variables[0]->var;
const struct glsl_type *type = instr->variables[0]->var->type;
bool da = glsl_sampler_type_is_array(var->type) ||
@@ -2782,68 +2782,68 @@ static LLVMValueRef visit_image_size(struct
nir_to_llvm_context *ctx,
params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE);
params[2] = LLVMConstInt(ctx->i32, 15, false);
params[3] = ctx->i32zero;
params[4] = ctx->i32zero;
params[5] = da ? ctx->i32one : ctx->i32zero;
params[6] = ctx->i32zero;
params[7] = ctx->i32zero;
params[8] = ctx->i32zero;
params[9] = ctx->i32zero;
- res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32",
ctx->v4i32,
- params, 10,
- AC_FUNC_ATTR_READNONE |
- AC_FUNC_ATTR_LEGACY);
+ res = ac_build_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32,
+ params, 10,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE &&
glsl_sampler_type_is_array(type)) {
LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false);
LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false);
LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res,
two, "");
z = LLVMBuildSDiv(ctx->builder, z, six, "");
res = LLVMBuildInsertElement(ctx->builder, res, z, two, "");
}
return res;
}
static void emit_waitcnt(struct nir_to_llvm_context *ctx)
{
LLVMValueRef args[1] = {
LLVMConstInt(ctx->i32, 0xf70, false),
};
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
- ctx->voidt, args, 1, 0);
+ ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
+ ctx->voidt, args, 1, 0);
}
static void emit_barrier(struct nir_to_llvm_context *ctx)
{
// TODO tess
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
- ctx->voidt, NULL, 0, 0);
+ ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
+ ctx->voidt, NULL, 0, 0);
}
static void emit_discard_if(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef cond;
ctx->shader_info->fs.can_discard = true;
cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
get_src(ctx, instr->src[0]),
ctx->i32zero, "");
cond = LLVMBuildSelect(ctx->builder, cond,
LLVMConstReal(ctx->f32, -1.0f),
ctx->f32zero, "");
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
- ctx->voidt,
- &cond, 1, AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
+ ctx->voidt,
+ &cond, 1, AC_FUNC_ATTR_LEGACY);
}
static LLVMValueRef
visit_load_local_invocation_index(struct nir_to_llvm_context *ctx)
{
LLVMValueRef result;
LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
result = LLVMBuildAnd(ctx->builder, ctx->tg_size,
LLVMConstInt(ctx->i32, 0xfc0, false), "");
@@ -3085,22 +3085,22 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
* vertices, kill it: excessive vertex emissions are not supposed to
* have any effect, and GS threads have no externally observable
* effects other than emitting vertices.
*/
can_emit = LLVMBuildICmp(ctx->builder, LLVMIntULT, gs_next_vertex,
LLVMConstInt(ctx->i32,
ctx->gs_max_out_vertices, false), "");
kill = LLVMBuildSelect(ctx->builder, can_emit,
LLVMConstReal(ctx->f32, 1.0f),
LLVMConstReal(ctx->f32, -1.0f), "");
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
- ctx->voidt, &kill, 1, AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac, "llvm.AMDGPU.kill",
+ ctx->voidt, &kill, 1, AC_FUNC_ATTR_LEGACY);
/* loop num outputs */
idx = 0;
for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
int length = 4;
int start = 0;
int slot = idx;
int slot_inc = 1;
@@ -3143,28 +3143,28 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
voffset, ctx->gs2vs_offset,
0,
1, 1, true, true);
}
idx += slot_inc;
}
gs_next_vertex = LLVMBuildAdd(ctx->builder, gs_next_vertex,
ctx->i32one, "");
LLVMBuildStore(ctx->builder, gs_next_vertex, ctx->gs_next_vertex);
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0 <<
8), ctx->gs_wave_id);
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0
<< 8), ctx->gs_wave_id);
}
static void
visit_end_primitive(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS | (0 <<
8), ctx->gs_wave_id);
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS | (0 <<
8), ctx->gs_wave_id);
}
static void visit_intrinsic(struct nir_to_llvm_context *ctx,
nir_intrinsic_instr *instr)
{
LLVMValueRef result = NULL;
switch (instr->intrinsic) {
case nir_intrinsic_load_work_group_id: {
result = ctx->workgroup_ids;
@@ -3272,23 +3272,23 @@ static void visit_intrinsic(struct nir_to_llvm_context
*ctx,
case nir_intrinsic_image_atomic_xor:
case nir_intrinsic_image_atomic_exchange:
case nir_intrinsic_image_atomic_comp_swap:
result = visit_image_atomic(ctx, instr);
break;
case nir_intrinsic_image_size:
result = visit_image_size(ctx, instr);
break;
case nir_intrinsic_discard:
ctx->shader_info->fs.can_discard = true;
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
- ctx->voidt,
- NULL, 0, AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
+ ctx->voidt,
+ NULL, 0, AC_FUNC_ATTR_LEGACY);
break;
case nir_intrinsic_discard_if:
emit_discard_if(ctx, instr);
break;
case nir_intrinsic_memory_barrier:
emit_waitcnt(ctx);
break;
case nir_intrinsic_barrier:
emit_barrier(ctx);
break;
@@ -3496,21 +3496,21 @@ static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx,
}
if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms ||
instr->op ==
nir_texop_samples_identical))
*fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK);
}
static LLVMValueRef apply_round_slice(struct nir_to_llvm_context *ctx,
LLVMValueRef coord)
{
coord = to_float(ctx, coord);
- coord = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32,
&coord, 1, 0);
+ coord = ac_build_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32, &coord,
1, 0);
coord = to_integer(ctx, coord);
return coord;
}
static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
{
LLVMValueRef result = NULL;
struct ac_tex_info tinfo = { 0 };
unsigned dmask = 0xf;
LLVMValueRef address[16];
@@ -3996,21 +3996,21 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id,
ctx->base_vertex, "");
for (unsigned i = 0; i < attrib_count; ++i, ++idx) {
t_offset = LLVMConstInt(ctx->i32, index + i, false);
t_list = ac_build_indexed_load_const(&ctx->ac, t_list_ptr,
t_offset);
args[0] = t_list;
args[1] = LLVMConstInt(ctx->i32, 0, false);
args[2] = buffer_index;
- input = ac_emit_llvm_intrinsic(&ctx->ac,
+ input = ac_build_intrinsic(&ctx->ac,
"llvm.SI.vs.load.input", ctx->v4f32, args, 3,
AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND |
AC_FUNC_ATTR_LEGACY);
for (unsigned chan = 0; chan < 4; chan++) {
LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan,
false);
ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] =
to_integer(ctx,
LLVMBuildExtractElement(ctx->builder,
input, llvm_chan, ""));
}
@@ -4152,21 +4152,21 @@ handle_fs_inputs_pre(struct nir_to_llvm_context *ctx,
interp_fs_input(ctx, index, interp_param,
ctx->prim_mask,
inputs);
if (!interp_param)
ctx->shader_info->fs.flat_shaded_mask |= 1u <<
index;
++index;
} else if (i == VARYING_SLOT_POS) {
for(int i = 0; i < 3; ++i)
inputs[i] = ctx->frag_pos[i];
- inputs[3] = ac_emit_fdiv(&ctx->ac, ctx->f32one,
ctx->frag_pos[3]);
+ inputs[3] = ac_build_fdiv(&ctx->ac, ctx->f32one,
ctx->frag_pos[3]);
}
}
ctx->shader_info->fs.num_interp = index;
if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
ctx->shader_info->fs.has_pcoord = true;
if (ctx->input_mask & (1 << VARYING_SLOT_PRIMITIVE_ID))
ctx->shader_info->fs.prim_id_input = true;
if (ctx->input_mask & (1 << VARYING_SLOT_LAYER))
ctx->shader_info->fs.layer_input = true;
ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
@@ -4349,24 +4349,24 @@ si_llvm_init_export_args(struct nir_to_llvm_context
*ctx,
case V_028714_SPI_SHADER_FP16_ABGR:
args[4] = ctx->i32one;
for (unsigned chan = 0; chan < 2; chan++) {
LLVMValueRef pack_args[2] = {
values[2 * chan],
values[2 * chan + 1]
};
LLVMValueRef packed;
- packed = ac_emit_llvm_intrinsic(&ctx->ac,
"llvm.SI.packf16",
- ctx->i32,
pack_args, 2,
-
AC_FUNC_ATTR_READNONE |
-
AC_FUNC_ATTR_LEGACY);
+ packed = ac_build_intrinsic(&ctx->ac,
"llvm.SI.packf16",
+ ctx->i32,
pack_args, 2,
+
AC_FUNC_ATTR_READNONE |
+
AC_FUNC_ATTR_LEGACY);
args[chan + 5] = packed;
}
break;
case V_028714_SPI_SHADER_UNORM16_ABGR:
for (unsigned chan = 0; chan < 4; chan++) {
val[chan] = emit_float_saturate(ctx,
values[chan], 0, 1);
val[chan] = LLVMBuildFMul(ctx->builder,
val[chan],
LLVMConstReal(ctx->f32,
65535), "");
val[chan] = LLVMBuildFAdd(ctx->builder,
val[chan],
@@ -4534,25 +4534,25 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx)
param_count++;
}
si_llvm_init_export_args(ctx, values, target, args);
if (target >= V_008DFC_SQ_EXP_POS &&
target <= (V_008DFC_SQ_EXP_POS + 3)) {
memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
args, sizeof(args));
} else {
- ac_emit_llvm_intrinsic(&ctx->ac,
- "llvm.SI.export",
- ctx->voidt,
- args, 9,
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac,
+ "llvm.SI.export",
+ ctx->voidt,
+ args, 9,
+ AC_FUNC_ATTR_LEGACY);
}
}
/* We need to add the position output manually if it's missing. */
if (!pos_args[0][0]) {
pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false);
pos_args[0][1] = ctx->i32zero; /* EXEC mask */
pos_args[0][2] = ctx->i32zero; /* last export? */
pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS,
false);
pos_args[0][4] = ctx->i32zero; /* COMPR flag */
@@ -4590,25 +4590,25 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx)
pos_idx = 0;
for (i = 0; i < 4; i++) {
if (!pos_args[i][0])
continue;
/* Specify the target we are exporting */
pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS +
pos_idx++, false);
if (pos_idx == num_pos_exports)
pos_args[i][2] = ctx->i32one;
- ac_emit_llvm_intrinsic(&ctx->ac,
- "llvm.SI.export",
- ctx->voidt,
- pos_args[i], 9,
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac,
+ "llvm.SI.export",
+ ctx->voidt,
+ pos_args[i], 9,
+ AC_FUNC_ATTR_LEGACY);
}
ctx->shader_info->vs.pos_exports = num_pos_exports;
ctx->shader_info->vs.param_exports = param_count;
}
static void
handle_es_outputs_post(struct nir_to_llvm_context *ctx)
{
int j;
@@ -4655,23 +4655,23 @@ si_export_mrt_color(struct nir_to_llvm_context *ctx,
/* Export */
si_llvm_init_export_args(ctx, color, param,
args);
if (is_last) {
args[1] = ctx->i32one; /* whether the EXEC mask is valid */
args[2] = ctx->i32one; /* DONE bit */
} else if (args[0] == ctx->i32zero)
return; /* unnecessary NULL export */
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
- ctx->voidt, args, 9,
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac, "llvm.SI.export",
+ ctx->voidt, args, 9,
+ AC_FUNC_ATTR_LEGACY);
}
static void
si_export_mrt_z(struct nir_to_llvm_context *ctx,
LLVMValueRef depth, LLVMValueRef stencil,
LLVMValueRef samplemask)
{
LLVMValueRef args[9];
unsigned mask = 0;
args[1] = ctx->i32one; /* whether the EXEC mask is valid */
@@ -4700,23 +4700,23 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx,
mask |= 0x04;
}
/* SI (except OLAND) has a bug that it only looks
* at the X writemask component. */
if (ctx->options->chip_class == SI &&
ctx->options->family != CHIP_OLAND)
mask |= 0x01;
args[0] = LLVMConstInt(ctx->i32, mask, false);
- ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export",
- ctx->voidt, args, 9,
- AC_FUNC_ATTR_LEGACY);
+ ac_build_intrinsic(&ctx->ac, "llvm.SI.export",
+ ctx->voidt, args, 9,
+ AC_FUNC_ATTR_LEGACY);
}
static void
handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
{
unsigned index = 0;
LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL;
for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
LLVMValueRef values[4];
@@ -4754,21 +4754,21 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx)
si_export_mrt_z(ctx, depth, stencil, samplemask);
else if (!index)
si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true);
ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0;
}
static void
emit_gs_epilogue(struct nir_to_llvm_context *ctx)
{
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_NOP | AC_SENDMSG_GS_DONE,
ctx->gs_wave_id);
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_NOP | AC_SENDMSG_GS_DONE,
ctx->gs_wave_id);
}
static void
handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
{
switch (ctx->stage) {
case MESA_SHADER_VERTEX:
if (ctx->options->key.vs.as_es)
handle_es_outputs_post(ctx);
else
@@ -5154,25 +5154,25 @@ ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
length = ctx->num_output_culls;
}
}
for (unsigned j = 0; j < length; j++) {
LLVMValueRef value;
args[2] = LLVMConstInt(ctx->i32,
(slot * 4 + j + start) *
ctx->gs_max_out_vertices * 16 *
4, false);
- value = ac_emit_llvm_intrinsic(&ctx->ac,
-
"llvm.SI.buffer.load.dword.i32.i32",
- ctx->i32, args, 9,
- AC_FUNC_ATTR_READONLY |
- AC_FUNC_ATTR_LEGACY);
+ value = ac_build_intrinsic(&ctx->ac,
+
"llvm.SI.buffer.load.dword.i32.i32",
+ ctx->i32, args, 9,
+ AC_FUNC_ATTR_READONLY |
+ AC_FUNC_ATTR_LEGACY);
LLVMBuildStore(ctx->builder,
to_float(ctx, value),
ctx->outputs[radeon_llvm_reg_index_soa(i, j)]);
}
idx += slot_inc;
}
handle_vs_outputs_post(ctx);
}
void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 4705900..c683cc9 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1025,21 +1025,21 @@ static void store_output_tcs(struct
lp_build_tgsi_context *bld_base,
lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP));
base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
buf_addr = get_tcs_tes_buffer_address_from_reg(ctx, reg, NULL);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
LLVMValueRef value = dst[chan_index];
if (inst->Instruction.Saturate)
- value = ac_emit_clamp(&ctx->ac, value);
+ value = ac_build_clamp(&ctx->ac, value);
/* Skip LDS stores if there is no LDS read of this output. */
if (!skip_lds_store)
lds_store(bld_base, chan_index, dw_addr, value);
value = LLVMBuildBitCast(gallivm->builder, value, ctx->i32, "");
values[chan_index] = value;
if (inst->Dst[0].Register.WriteMask != 0xF && !is_tess_factor) {
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
@@ -1797,30 +1797,30 @@ static void si_llvm_init_export_args(struct
lp_build_tgsi_context *bld_base,
case V_028714_SPI_SHADER_FP16_ABGR:
args->compr = 1; /* COMPR flag */
for (chan = 0; chan < 2; chan++) {
LLVMValueRef pack_args[2] = {
values[2 * chan],
values[2 * chan + 1]
};
LLVMValueRef packed;
- packed = ac_emit_cvt_pkrtz_f16(&ctx->ac, pack_args);
+ packed = ac_build_cvt_pkrtz_f16(&ctx->ac, pack_args);
args->out[chan] =
LLVMBuildBitCast(base->gallivm->builder,
packed, ctx->f32, "");
}
break;
case V_028714_SPI_SHADER_UNORM16_ABGR:
for (chan = 0; chan < 4; chan++) {
- val[chan] = ac_emit_clamp(&ctx->ac, values[chan]);
+ val[chan] = ac_build_clamp(&ctx->ac, values[chan]);
val[chan] = LLVMBuildFMul(builder, val[chan],
lp_build_const_float(gallivm,
65535), "");
val[chan] = LLVMBuildFAdd(builder, val[chan],
lp_build_const_float(gallivm,
0.5), "");
val[chan] = LLVMBuildFPToUI(builder, val[chan],
ctx->i32, "");
}
args->compr = 1; /* COMPR flag */
args->out[0] = bitcast(bld_base, TGSI_TYPE_FLOAT,
@@ -1928,23 +1928,23 @@ static void si_alpha_test(struct lp_build_tgsi_context
*bld_base,
LLVMValueRef alpha_pass =
lp_build_cmp(&bld_base->base,
ctx->shader->key.part.ps.epilog.alpha_func,
alpha, alpha_ref);
LLVMValueRef arg =
lp_build_select(&bld_base->base,
alpha_pass,
lp_build_const_float(gallivm, 1.0f),
lp_build_const_float(gallivm, -1.0f));
- ac_emit_kill(&ctx->ac, arg);
+ ac_build_kill(&ctx->ac, arg);
} else {
- ac_emit_kill(&ctx->ac, NULL);
+ ac_build_kill(&ctx->ac, NULL);
}
}
static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base,
LLVMValueRef alpha,
unsigned samplemask_param)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMValueRef coverage;
@@ -2269,21 +2269,21 @@ handle_semantic:
semantic_name);
}
si_llvm_init_export_args(bld_base, outputs[i].values, target,
&args);
if (target >= V_008DFC_SQ_EXP_POS &&
target <= (V_008DFC_SQ_EXP_POS + 3)) {
memcpy(&pos_args[target - V_008DFC_SQ_EXP_POS],
&args, sizeof(args));
} else {
- ac_emit_export(&ctx->ac, &args);
+ ac_build_export(&ctx->ac, &args);
}
if (semantic_name == TGSI_SEMANTIC_CLIPDIST) {
semantic_name = TGSI_SEMANTIC_GENERIC;
goto handle_semantic;
}
}
shader->info.nr_param_exports = param_count;
@@ -2353,21 +2353,21 @@ handle_semantic:
if (!pos_args[i].out[0])
continue;
/* Specify the target we are exporting */
pos_args[i].target = V_008DFC_SQ_EXP_POS + pos_idx++;
if (pos_idx == shader->info.nr_pos_exports)
/* Specify that this is the last export */
pos_args[i].done = 1;
- ac_emit_export(&ctx->ac, &pos_args[i]);
+ ac_build_export(&ctx->ac, &pos_args[i]);
}
}
/**
* Forward all outputs from the vertex shader to the TES. This is only used
* for the fixed function TCS.
*/
static void si_copy_tcs_inputs(struct lp_build_tgsi_context *bld_base)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
@@ -2692,22 +2692,22 @@ static void si_llvm_emit_es_epilogue(struct
lp_build_tgsi_context *bld_base)
(4 * param_index + chan) *
4,
1, 1, true, true);
}
}
}
static void si_llvm_emit_gs_epilogue(struct lp_build_tgsi_context *bld_base)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_NOP | AC_SENDMSG_GS_DONE,
- LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_NOP | AC_SENDMSG_GS_DONE,
+ LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
}
static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context *bld_base)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
struct tgsi_shader_info *info = &ctx->shader->selector->info;
struct si_shader_output_values *outputs = NULL;
int i,j;
@@ -2737,21 +2737,21 @@ static void si_llvm_emit_vs_epilogue(struct
lp_build_tgsi_context *bld_base)
cond = LLVMGetParam(ctx->main_fn,
SI_PARAM_VS_STATE_BITS);
cond = LLVMBuildTrunc(gallivm->builder, cond,
ctx->i1, "");
lp_build_if(&if_ctx, gallivm, cond);
}
for (j = 0; j < 4; j++) {
addr = ctx->outputs[i][j];
val = LLVMBuildLoad(gallivm->builder, addr, "");
- val = ac_emit_clamp(&ctx->ac, val);
+ val = ac_build_clamp(&ctx->ac, val);
LLVMBuildStore(gallivm->builder, val, addr);
}
}
if (cond)
lp_build_endif(&if_ctx);
}
for (i = 0; i < info->num_outputs; i++) {
outputs[i].semantic_name = info->output_semantic_name[i];
@@ -2882,21 +2882,21 @@ static void si_export_mrt_color(struct
lp_build_tgsi_context *bld_base,
unsigned samplemask_param,
bool is_last, struct si_ps_exports *exp)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
int i;
/* Clamp color */
if (ctx->shader->key.part.ps.epilog.clamp_color)
for (i = 0; i < 4; i++)
- color[i] = ac_emit_clamp(&ctx->ac, color[i]);
+ color[i] = ac_build_clamp(&ctx->ac, color[i]);
/* Alpha to one */
if (ctx->shader->key.part.ps.epilog.alpha_to_one)
color[3] = base->one;
/* Alpha test */
if (index == 0 &&
ctx->shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS)
si_alpha_test(bld_base, color[3]);
@@ -2941,40 +2941,40 @@ static void si_export_mrt_color(struct
lp_build_tgsi_context *bld_base,
return; /* unnecessary NULL export */
memcpy(&exp->args[exp->num++], &args, sizeof(args));
}
}
static void si_emit_ps_exports(struct si_shader_context *ctx,
struct si_ps_exports *exp)
{
for (unsigned i = 0; i < exp->num; i++)
- ac_emit_export(&ctx->ac, &exp->args[i]);
+ ac_build_export(&ctx->ac, &exp->args[i]);
}
static void si_export_null(struct lp_build_tgsi_context *bld_base)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
struct ac_export_args args;
args.enabled_channels = 0x0; /* enabled channels */
args.valid_mask = 1; /* whether the EXEC mask is valid */
args.done = 1; /* DONE bit */
args.target = V_008DFC_SQ_EXP_NULL;
args.compr = 0; /* COMPR flag (0 = 32-bit export) */
args.out[0] = base->undef; /* R */
args.out[1] = base->undef; /* G */
args.out[2] = base->undef; /* B */
args.out[3] = base->undef; /* A */
- ac_emit_export(&ctx->ac, &args);
+ ac_build_export(&ctx->ac, &args);
}
/**
* Return PS outputs in this order:
*
* v[0:3] = color0.xyzw
* v[4:7] = color1.xyzw
* ...
* vN+0 = Depth
* vN+1 = Stencil
@@ -4141,21 +4141,21 @@ static void resq_emit(
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
out = LLVMBuildExtractElement(builder, emit_data->args[0],
lp_build_const_int32(gallivm, 2),
"");
} else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
out = get_buffer_size(bld_base, emit_data->args[0]);
} else {
struct ac_image_args args;
memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
args.opcode = ac_image_get_resinfo;
- out = ac_emit_image_opcode(&ctx->ac, &args);
+ out = ac_build_image_opcode(&ctx->ac, &args);
/* Divide the number of layers by 6 to get the number of cubes.
*/
if (inst->Memory.Texture == TGSI_TEXTURE_CUBE_ARRAY) {
LLVMValueRef imm2 = lp_build_const_int32(gallivm, 2);
LLVMValueRef imm6 = lp_build_const_int32(gallivm, 6);
LLVMValueRef z = LLVMBuildExtractElement(builder, out,
imm2, "");
z = LLVMBuildSDiv(builder, z, imm6, "");
out = LLVMBuildInsertElement(builder, out, z, imm2, "");
}
@@ -4334,21 +4334,21 @@ static void txq_emit(const struct lp_build_tgsi_action
*action,
if (target == TGSI_TEXTURE_BUFFER) {
/* Just return the buffer size. */
emit_data->output[emit_data->chan] = emit_data->args[0];
return;
}
memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
args.opcode = ac_image_get_resinfo;
emit_data->output[emit_data->chan] =
- ac_emit_image_opcode(&ctx->ac, &args);
+ ac_build_image_opcode(&ctx->ac, &args);
/* Divide the number of layers by 6 to get the number of cubes. */
if (target == TGSI_TEXTURE_CUBE_ARRAY ||
target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) {
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
LLVMValueRef two = lp_build_const_int32(bld_base->base.gallivm,
2);
LLVMValueRef six = lp_build_const_int32(bld_base->base.gallivm,
6);
LLVMValueRef v4 = emit_data->output[emit_data->chan];
LLVMValueRef z = LLVMBuildExtractElement(builder, v4, two, "");
@@ -4449,21 +4449,21 @@ static void tex_fetch_args(
}
/* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
* so the depth comparison value isn't clamped for Z16 and
* Z24 anymore. Do it manually here.
*
* It's unnecessary if the original texture format was
* Z32_FLOAT, but we don't know that here.
*/
if (ctx->screen->b.chip_class == VI)
- z = ac_emit_clamp(&ctx->ac, z);
+ z = ac_build_clamp(&ctx->ac, z);
address[count++] = z;
}
/* Pack user derivatives */
if (opcode == TGSI_OPCODE_TXD) {
int param, num_src_deriv_channels;
switch (target) {
case TGSI_TEXTURE_3D:
@@ -4828,21 +4828,21 @@ static void build_tex_intrinsic(const struct
lp_build_tgsi_action *action,
unsigned sampler = inst->Src[src_idx].Register.Index;
assert(inst->Src[src_idx].Register.File == TGSI_FILE_SAMPLER);
if (info->sampler_type[sampler] == TGSI_RETURN_TYPE_SINT ||
info->sampler_type[sampler] == TGSI_RETURN_TYPE_UINT)
si_lower_gather4_integer(ctx, &args, target);
}
emit_data->output[emit_data->chan] =
- ac_emit_image_opcode(&ctx->ac, &args);
+ ac_build_image_opcode(&ctx->ac, &args);
}
static void si_llvm_emit_txqs(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
@@ -4883,22 +4883,22 @@ static void si_llvm_emit_ddxy(
mask = AC_TID_MASK_LEFT;
else if (opcode == TGSI_OPCODE_DDY_FINE)
mask = AC_TID_MASK_TOP;
else
mask = AC_TID_MASK_TOP_LEFT;
/* for DDX we want to next X pixel, DDY next Y pixel. */
idx = (opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE) ? 1
: 2;
val = LLVMBuildBitCast(gallivm->builder, emit_data->args[0], ctx->i32,
"");
- val = ac_emit_ddxy(&ctx->ac, ctx->screen->has_ds_bpermute,
- mask, idx, ctx->lds, val);
+ val = ac_build_ddxy(&ctx->ac, ctx->screen->has_ds_bpermute,
+ mask, idx, ctx->lds, val);
emit_data->output[emit_data->chan] = val;
}
/*
* this takes an I,J coordinate pair,
* and works out the X and Y derivatives.
* it returns DDX(I), DDX(J), DDY(I), DDY(J).
*/
static LLVMValueRef si_llvm_emit_ddxy_interp(
struct lp_build_tgsi_context *bld_base,
@@ -5116,21 +5116,21 @@ static void si_llvm_emit_vertex(
can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULT, gs_next_vertex,
lp_build_const_int32(gallivm,
shader->selector->gs_max_out_vertices), "");
bool use_kill = !info->writes_memory;
if (use_kill) {
kill = lp_build_select(&bld_base->base, can_emit,
lp_build_const_float(gallivm, 1.0f),
lp_build_const_float(gallivm, -1.0f));
- ac_emit_kill(&ctx->ac, kill);
+ ac_build_kill(&ctx->ac, kill);
} else {
lp_build_if(&if_state, gallivm, can_emit);
}
offset = 0;
for (i = 0; i < info->num_outputs; i++) {
LLVMValueRef *out_ptr = ctx->outputs[i];
for (chan = 0; chan < 4; chan++) {
if (!(info->output_usagemask[i] & (1 << chan)) ||
@@ -5155,39 +5155,39 @@ static void si_llvm_emit_vertex(
1, 1, true, true);
}
}
gs_next_vertex = lp_build_add(uint, gs_next_vertex,
lp_build_const_int32(gallivm, 1));
LLVMBuildStore(gallivm->builder, gs_next_vertex,
ctx->gs_next_vertex[stream]);
/* Signal vertex emission */
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS |
(stream << 8),
- LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS |
(stream << 8),
+ LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
if (!use_kill)
lp_build_endif(&if_state);
}
/* Cut one primitive from the geometry shader */
static void si_llvm_emit_primitive(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
unsigned stream;
/* Signal primitive cut */
stream = si_llvm_get_stream(bld_base, emit_data);
- ac_emit_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS |
(stream << 8),
- LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
+ ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_CUT | AC_SENDMSG_GS |
(stream << 8),
+ LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
}
static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
/* SI only (thanks to a hw bug workaround):
@@ -5749,21 +5749,21 @@ static void si_llvm_emit_polygon_stipple(struct
si_shader_context *ctx,
offset = LLVMBuildMul(builder, address[1],
LLVMConstInt(ctx->i32, 4, 0), "");
row = buffer_load_const(ctx, desc, offset);
row = LLVMBuildBitCast(builder, row, ctx->i32, "");
bit = LLVMBuildLShr(builder, row, address[0], "");
bit = LLVMBuildTrunc(builder, bit, ctx->i1, "");
/* The intrinsic kills the thread if arg < 0. */
bit = LLVMBuildSelect(builder, bit, LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, -1), "");
- ac_emit_kill(&ctx->ac, bit);
+ ac_build_kill(&ctx->ac, bit);
}
void si_shader_binary_read_config(struct radeon_shader_binary *binary,
struct si_shader_config *conf,
unsigned symbol_offset)
{
unsigned i;
const unsigned char *config =
radeon_shader_binary_config_start(binary, symbol_offset);
bool really_needs_scratch = false;
@@ -7677,21 +7677,21 @@ static void si_build_vs_epilog_function(struct
si_shader_context *ctx,
args.done = 0; /* DONE bit */
args.target = V_008DFC_SQ_EXP_PARAM +
key->vs_epilog.prim_id_param_offset;
args.compr = 0; /* COMPR flag (0 = 32-bit export) */
args.out[0] = LLVMGetParam(ctx->main_fn,
VS_EPILOG_PRIMID_LOC); /* X */
args.out[1] = base->undef; /* Y */
args.out[2] = base->undef; /* Z */
args.out[3] = base->undef; /* W */
- ac_emit_export(&ctx->ac, &args);
+ ac_build_export(&ctx->ac, &args);
}
LLVMBuildRetVoid(gallivm->builder);
}
/**
* Create & compile a vertex shader epilog. This a helper used by VS and TES.
*/
static bool si_get_vs_epilog(struct si_screen *sscreen,
LLVMTargetMachineRef tm,
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 91fd7e4..eeff71d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -55,23 +55,23 @@ static void kill_if_fetch_args(struct lp_build_tgsi_context
*bld_base,
bld_base->base.zero, "");
}
static void kil_emit(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF)
- ac_emit_kill(&ctx->ac, emit_data->args[0]);
+ ac_build_kill(&ctx->ac, emit_data->args[0]);
else
- ac_emit_kill(&ctx->ac, NULL);
+ ac_build_kill(&ctx->ac, NULL);
}
static void emit_icmp(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
unsigned pred;
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
LLVMContextRef context = bld_base->base.gallivm->context;
@@ -499,23 +499,23 @@ static void emit_bfi(const struct lp_build_tgsi_action
*action,
static void emit_bfe(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef bfe_sm5;
LLVMValueRef cond;
- bfe_sm5 = ac_emit_bfe(&ctx->ac, emit_data->args[0],
- emit_data->args[1], emit_data->args[2],
- emit_data->info->opcode == TGSI_OPCODE_IBFE);
+ bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
+ emit_data->args[1], emit_data->args[2],
+ emit_data->info->opcode == TGSI_OPCODE_IBFE);
/* Correct for GLSL semantics. */
cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2],
lp_build_const_int32(gallivm, 32), "");
emit_data->output[emit_data->chan] =
LLVMBuildSelect(builder, cond, emit_data->args[0], bfe_sm5, "");
}
/* this is ffs in C */
static void emit_lsb(const struct lp_build_tgsi_action *action,
@@ -552,32 +552,32 @@ static void emit_lsb(const struct lp_build_tgsi_action
*action,
}
/* Find the last bit set. */
static void emit_umsb(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] =
- ac_emit_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
+ ac_build_umsb(&ctx->ac, emit_data->args[0],
emit_data->dst_type);
}
/* Find the last bit opposite of the sign bit. */
static void emit_imsb(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
emit_data->output[emit_data->chan] =
- ac_emit_imsb(&ctx->ac, emit_data->args[0],
- emit_data->dst_type);
+ ac_build_imsb(&ctx->ac, emit_data->args[0],
+ emit_data->dst_type);
}
static void emit_iabs(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
emit_data->output[emit_data->chan] =
lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX,
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 4601ca9..7d9f874 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -981,21 +981,21 @@ void si_llvm_emit_store(struct lp_build_tgsi_context
*bld_base,
bld_base->emit_store(bld_base, inst, info, values);
return;
}
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
LLVMValueRef value = dst[chan_index];
if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index
== 3))
continue;
if (inst->Instruction.Saturate)
- value = ac_emit_clamp(&ctx->ac, value);
+ value = ac_build_clamp(&ctx->ac, value);
if (reg->Register.File == TGSI_FILE_ADDRESS) {
temp_ptr = ctx->addrs[reg->Register.Index][chan_index];
LLVMBuildStore(builder, value, temp_ptr);
continue;
}
if (!tgsi_type_is_64bit(dtype))
value = bitcast(bld_base, TGSI_TYPE_FLOAT, value);
--
2.7.4
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
