[Mesa-dev] [PATCH 10/10] ac: remove the remaining duplicate llvm types

[Timothy Arceri]

---
 src/amd/common/ac_nir_to_llvm.c | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ec51ed7007..38a65b9cd1 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -127,22 +127,20 @@ struct nir_to_llvm_context {
        LLVMValueRef esgs_ring;
        LLVMValueRef gsvs_ring;
        LLVMValueRef hs_ring_tess_offchip;
        LLVMValueRef hs_ring_tess_factor;
 
        LLVMValueRef prim_mask;
        LLVMValueRef sample_pos_offset;
        LLVMValueRef persp_sample, persp_center, persp_centroid;
        LLVMValueRef linear_sample, linear_center, linear_centroid;
 
-       unsigned uniform_md_kind;
-       LLVMValueRef empty_md;
        gl_shader_stage stage;
 
        LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
        uint64_t input_mask;
        uint64_t output_mask;
        uint8_t num_output_clips;
        uint8_t num_output_culls;
 
        bool is_gs_copy_shader;
@@ -973,27 +971,20 @@ static void create_function(struct nir_to_llvm_context 
*ctx,
                        set_userdata_location_shader(ctx, 
AC_UD_PS_SAMPLE_POS_OFFSET, &user_sgpr_idx, 1);
                }
                break;
        default:
                unreachable("Shader stage not implemented");
        }
 
        ctx->shader_info->num_user_sgprs = user_sgpr_idx;
 }
 
-static void setup_types(struct nir_to_llvm_context *ctx)
-{
-       ctx->uniform_md_kind =
-           LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14);
-       ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
-}
-
 static int get_llvm_num_components(LLVMValueRef value)
 {
        LLVMTypeRef type = LLVMTypeOf(value);
        unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
                                      ? LLVMGetVectorSize(type)
                                      : 1;
        return num_components;
 }
 
 static LLVMValueRef llvm_extract_elem(struct ac_llvm_context *ac,
@@ -2213,21 +2204,21 @@ static LLVMValueRef visit_vulkan_resource_index(struct 
nir_to_llvm_context *ctx,
                stride = LLVMConstInt(ctx->ac.i32, 16, false);
        } else
                stride = LLVMConstInt(ctx->ac.i32, 
layout->binding[binding].size, false);
 
        offset = LLVMConstInt(ctx->ac.i32, base_offset, false);
        index = LLVMBuildMul(ctx->builder, index, stride, "");
        offset = LLVMBuildAdd(ctx->builder, offset, index, "");
        
        desc_ptr = ac_build_gep0(&ctx->ac, desc_ptr, offset);
        desc_ptr = cast_ptr(ctx, desc_ptr, ctx->ac.v4i32);
-       LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md);
+       LLVMSetMetadata(desc_ptr, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
 
        return LLVMBuildLoad(ctx->builder, desc_ptr, "");
 }
 
 static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx,
                                              nir_intrinsic_instr *instr)
 {
        LLVMValueRef ptr, addr;
 
        addr = LLVMConstInt(ctx->ac.i32, nir_intrinsic_base(instr), 0);
@@ -6474,21 +6465,20 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
        ac_llvm_context_init(&ctx.ac, ctx.context, options->chip_class);
        ctx.ac.module = ctx.module;
        LLVMSetTarget(ctx.module, options->supports_spill ? 
"amdgcn-mesa-mesa3d" : "amdgcn--");
 
        LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm);
        char *data_layout_str = LLVMCopyStringRepOfTargetData(data_layout);
        LLVMSetDataLayout(ctx.module, data_layout_str);
        LLVMDisposeTargetData(data_layout);
        LLVMDisposeMessage(data_layout_str);
 
-       setup_types(&ctx);
        ctx.builder = LLVMCreateBuilderInContext(ctx.context);
        ctx.ac.builder = ctx.builder;
 
        memset(shader_info, 0, sizeof(*shader_info));
 
        for(int i = 0; i < shader_count; ++i)
                ac_nir_shader_info_pass(shaders[i], options, 
&shader_info->info);
 
        for (i = 0; i < AC_UD_MAX_SETS; i++)
                shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
@@ -6847,21 +6837,20 @@ void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
        ctx.context = LLVMContextCreate();
        ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context);
        ctx.options = options;
        ctx.shader_info = shader_info;
 
        ac_llvm_context_init(&ctx.ac, ctx.context, options->chip_class);
        ctx.ac.module = ctx.module;
 
        ctx.is_gs_copy_shader = true;
        LLVMSetTarget(ctx.module, "amdgcn--");
-       setup_types(&ctx);
 
        ctx.builder = LLVMCreateBuilderInContext(ctx.context);
        ctx.ac.builder = ctx.builder;
        ctx.stage = MESA_SHADER_VERTEX;
 
        create_function(&ctx, MESA_SHADER_VERTEX, false, MESA_SHADER_VERTEX);
 
        ctx.gs_max_out_vertices = geom_shader->info.gs.vertices_out;
        ac_setup_rings(&ctx);
 
-- 
2.14.3

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