Pushed with the title changed.

Thanks again.

On 09/05/18 15:39, Rafael Antognolli wrote:
In the summary log, you should drop the mention to post sync operation
too, and mention stall on pixel scoreboard, right?

With that, this and the next patches are

Reviewed-by: Rafael Antognolli <rafael.antogno...@intel.com>

On Wed, May 09, 2018 at 12:39:51AM +0100, Lionel Landwerlin wrote:
Invalidating the indirect state pointers might affect a previously
scheduled & still running 3DPRIMITIVE (causing page fault). So stall
on pixel scoreboard before that.

v2: Fix compile issue :(

v3: Stall on pixel scoreboard

v4: Drop the post sync operation (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Fixes: ca19ee33d7d39 ("i965/gen10: Ignore push constant packets during context 
restore.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106243
---
  src/mesa/drivers/dri/i965/brw_pipe_control.c | 9 ++++++++-
  1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c 
b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 02278be6d62..879bfb660ed 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -349,14 +349,21 @@ gen7_emit_vs_workaround_flush(struct brw_context *brw)
   * context restore, so the mentioned hang doesn't happen. However,
   * software must program push constant commands for all stages prior to
   * rendering anything, so we flag them as dirty.
+ *
+ * Finally, we also make sure to stall at pixel scoreboard to make sure the
+ * constants have been loaded into the EUs prior to disable the push constants
+ * so that it doesn't hang a previous 3DPRIMITIVE.
   */
  void
  gen10_emit_isp_disable(struct brw_context *brw)
  {
     brw_emit_pipe_control(brw,
-                         PIPE_CONTROL_ISP_DIS |
+                         PIPE_CONTROL_STALL_AT_SCOREBOARD |
                           PIPE_CONTROL_CS_STALL,
                           NULL, 0, 0);
+   brw_emit_pipe_control(brw,
+                         PIPE_CONTROL_ISP_DIS,
+                         NULL, 0, 0);
brw->vs.base.push_constants_dirty = true;
     brw->tcs.base.push_constants_dirty = true;
--
2.17.0

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