Actually ignore my comment, I forgot that docs/features.txt is for non-vendor specific features only. I'll go ahead and push your patches. Sorry for the confusion.
Thanks, Pam On Tue, Aug 28, 2018 at 1:04 PM Manolova, Plamena < plamena.manol...@intel.com> wrote: > Hi Kevin, > Could you also mark the extension as done in docs/features.txt? Otherwise > the series looks good to me > and with that tiny change it's Reviewed-by: Plamena Manolova < > plamena.manol...@intel.com> > > Thanks, > Pam > > On Mon, Aug 27, 2018 at 9:56 AM <kevin.rogo...@intel.com> wrote: > >> From: Kevin Rogovin <kevin.rogo...@intel.com> >> >> INTEL_fragment_shader_ordering provides the ability for shaders >> to issue a call to gaurnantee memory write operation ordering >> of overlapping pixels or samples. In contrast to >> ARB_fragment_shader_interlock, INTEL_fragment_shader_ordering >> instead of defining a critical region (which must be in main() and >> under no flow control) provides a single function that acts like >> a memory barrier that can be called under any control flow. >> >> Kevin Rogovin (2): >> mesa: Add GL/GLSL plumbing for INTEL_fragment_shader_ordering. >> i965: Add INTEL_fragment_shader_ordering support. >> >> docs/relnotes/18.3.0.html | 1 + >> src/compiler/glsl/builtin_functions.cpp | 17 +++++++++++++++++ >> src/compiler/glsl/glsl_parser_extras.cpp | 1 + >> src/compiler/glsl/glsl_parser_extras.h | 2 ++ >> src/compiler/glsl/glsl_to_nir.cpp | 6 ++++++ >> src/compiler/glsl/ir.h | 1 + >> src/compiler/nir/nir_intrinsics.py | 1 + >> src/intel/compiler/brw_fs_nir.cpp | 1 + >> src/mesa/drivers/dri/i965/intel_extensions.c | 1 + >> src/mesa/main/extensions_table.h | 1 + >> src/mesa/main/mtypes.h | 1 + >> 11 files changed, 33 insertions(+) >> >> -- >> 2.17.1 >> >> _______________________________________________ >> mesa-dev mailing list >> mesa-dev@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/mesa-dev >> >
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