--- src/intel/vulkan/genX_pipeline.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 975052deb79..8ba206ed8c4 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -554,26 +554,11 @@ emit_ms_state(struct anv_pipeline *pipeline, uint32_t samples = 1; uint32_t log2_samples = 0; - /* From the Vulkan 1.0 spec: - * If pSampleMask is NULL, it is treated as if the mask has all bits - * enabled, i.e. no coverage is removed from fragments. - * - * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits. - */ -#if GEN_GEN >= 8 - uint32_t sample_mask = 0xffff; -#else - uint32_t sample_mask = 0xff; -#endif - if (info) { samples = info->rasterizationSamples; log2_samples = __builtin_ffs(samples) - 1; } - if (info && info->pSampleMask) - sample_mask &= info->pSampleMask[0]; - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { ms.NumberofMultisamples = log2_samples; @@ -607,7 +592,19 @@ emit_ms_state(struct anv_pipeline *pipeline, } anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) { - sm.SampleMask = sample_mask; + /* From the Vulkan 1.0 spec: + * If pSampleMask is NULL, it is treated as if the mask has all bits + * enabled, i.e. no coverage is removed from fragments. + * + * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits. + */ +#if GEN_GEN >= 8 + sm.SampleMask = 0xffff; +#else + sm.SampleMask = 0xff; +#endif + if (info && info->pSampleMask) + sm.SampleMask &= info->pSampleMask[0]; } } -- 2.20.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev